Antonio Mastrandrea
Orcid: 0000-0002-2092-8354
According to our database1,
Antonio Mastrandrea
authored at least 36 papers
between 2013 and 2024.
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Bibliography
2024
A Simple Microwave Imaging System for Food Product Inspection through a Symmetry-Based Microwave Imaging Approach.
Sensors, 2024
2023
Automatic Hardware Accelerators Reconfiguration through LinearUCB Algorithms on a RISC-V Processor.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023
A Universal Hardware Emulator for Verification IPs on FPGA: A Novel and Low-Cost Approach.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
Single Event Transient Reliability Analysis on a Fault-Tolerant RISC-V Microprocessor Design.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2023
2022
Design and Evaluation of Buffered Triple Modular Redundancy in Interleaved-Multi-Threading Processors.
IEEE Access, 2022
Analysis of a Fault Tolerant Edge-Computing Microarchitecture Exploiting Vector Acceleration.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2022
Proceedings of the Sensors and Microsystems, 2022
2021
SystemC Implementation of Stochastic Petri Nets for Simulation and Parameterization of Biological Networks.
ACM Trans. Embed. Comput. Syst., 2021
IEEE Micro, 2021
A Fault Tolerant soft-core obtained from an Interleaved-Multi- Threading RISC- V microprocessor design.
Proceedings of the 36th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2021
A Ladder Network Theoretical Approach for the Automatic Monitoring of Distributed Sensors.
Proceedings of the Sensors and Microsystems - Proceedings of AISEM 2021, 2021
2020
CoRR, 2020
Fault resilience analysis of a RISC-V microprocessor design through a dedicated UVM environment.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020
2019
J. Low Power Electron., 2019
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
On the Simulation and Automatic Parametrization of Metabolic Networks Through Electronic Design Automation.
Proceedings of the Computational Intelligence Methods for Bioinformatics and Biostatistics, 2019
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
Efficient Mathematical Accelerator Design Coupled with an Interleaved Multi-threading RISC-V Microprocessor.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
A RISC-V Fault-Tolerant Microcontroller Core Architecture Based on a Hardware Thread Full/Partial Protection and a Thread-Controlled Watch-Dog Timer.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019
2018
Proceedings of the High Performance Computing, 2018
Proceedings of the 2018 New Generation of CAS, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2018
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2018
2017
Investigation on the Optimal Pipeline Organization in RISC-V Multi-threaded Soft Processor Cores.
Proceedings of the New Generation of CAS, 2017
The Microarchitecture of a Multi-threaded RISC-V Compliant Processing Core Family for IoT End-Nodes.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2017
2016
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2016
2015
Effect of NBTI/PBTI aging and process variations on write failures in MOSFET and FinFET flip-flops.
Microelectron. Reliab., 2015
2014
Logic Drivers: A Propagation Delay Modeling Paradigm for Statistical Simulation of Standard Cell Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2014
A Voltage-Based Leakage Current Calculation Scheme and its Application to Nanoscale MOSFET and FinFET Standard-Cell Designs.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
A General Design Methodology for Synchronous Early-Completion-Prediction Adders in Nano-CMOS DSP Architectures.
VLSI Design, 2013