Gary Block

According to our database1, Gary Block authored at least 5 papers between 1996 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
A scalable LDPC decoder ASIC architecture with bit-serial message exchange.
Integr., 2008

Selection and Use of Programmable Logic in Flight Applications.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008

2007
A Heterogeneous Lightweight Multithreaded Architecture.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

2005
A memory-based architecture for FPGA implementations of low-density parity-check convolutional decoders.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

1996
Building a Metadata Manager within a Standardized Flight Test Environment.
Proceedings of the 1st IEEE Metadata Conference 1996, MD 1996, Silver Spring, 1996


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