Georgios Vavouliotis

Orcid: 0000-0002-5416-6634

According to our database1, Georgios Vavouliotis authored at least 5 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023
Concurrent GCs and Modern Java Workloads: A Cache Perspective.
Proceedings of the 2023 ACM SIGPLAN International Symposium on Memory Management, 2023

2022
Page Size Aware Cache Prefetching.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2021
Morrigan: A Composite Instruction TLB Prefetcher.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Exploiting Page Table Locality for Agile TLB Prefetching.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021


  Loading...