Giri Nallapati

According to our database, Giri Nallapati authored at least 4 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

High Performance 5G Mobile SOC Productization with 4nm EUV Fin-FET Technology.

Jun Yuan, Jie Deng, Vicki Lin, Ying Chen, Joseph Chiu, Minghuei Lin, Jun Chen, Deedee Zhang, Yukai Chen, David Liu, Bo Yu, Hao Wang, Giri Nallapati, Vivek Mohan, Venu Sanaka, Berkan Baran, Frank Dahan, Prasad Bhadri, Rajesh Geol, Venu Boynapalli, Seyfi Bazarjani, Paul Penzes, Parag Agashe, P. R. Chidambaram

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2018

Analog/mixed-signal design challenges in 7-nm CMOS and beyond.

Alvin Leng Sun Loke, Da Yang, Tin Tin Wee, Jonathan L. Holland, Patrick Isakanian, Kern Rim, Sam Yang, Jacob S. Schneider, Giri Nallapati, Sreeker Dundigal, Hasnain Lakdawala, Behnam Amelifard, Chulkyu Lee, Betty McGovern, Paul S. Holdaway, Xiaohua Kong, Burton M. Leary

Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2016

Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.

Seung Chul Song, J. Xu, D. Yang, K. Rim, P. Feng, Jerry Bao, J. Zhu, Joseph Wang, G. Nallapati, Mustafa Badaroglu, Praneeth Narayanasetti, B. Bucki, Jeff Fischer, Geoffrey Yeap

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2014

Mobile CPU power/performance benchmarking and process technology co-optimization.

Robert Bucki, Todd Bridges, Benjamin Bowers, T. Xue, I. Mir, D. Le, T. Kazi, Jeff Fischer, Samit Ekbote, S. Sengupta, G. Nallapati

Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014