Hasnain Lakdawala

According to our database1, Hasnain Lakdawala authored at least 37 papers between 2001 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2019

2015
A 1.2 V 2.64 GS/s 8 bit 39 mW Skew-Tolerant Time-interleaved SAR ADC in 40 nm Digital LP CMOS for 60 GHz WLAN.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
A 1.2 V 2.64 GS/s 8bit 39 mW skew-tolerant time-interleaved SAR ADC in 40 nm digital LP CMOS for 60 GHz WLAN.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
Introduction to the Special Issue on the IEEE 2012 Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2013

A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver.
IEEE J. Solid State Circuits, 2013

A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver.
IEEE J. Solid State Circuits, 2013

Oversampled ADC's.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

Analog techniques II.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement.
IEEE J. Solid State Circuits, 2012

A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS.
IEEE J. Solid State Circuits, 2012

Introduction to the Special Issue on the IEEE 2011 Custom Integrated Circuits Conference.
IEEE J. Solid State Circuits, 2012

A 0.8-2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ΣΔ ADC in 0.13 µm CMOS.
IEEE J. Solid State Circuits, 2012

A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS.
Proceedings of the Symposium on VLSI Circuits, 2012

A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A reconfigurable distributed all-digital clock generator core with SSC and skew correction in 22nm high-k tri-gate LP CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012


A programmable calibration/BIST engine for RF/analog blocks in SoCs.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2011
A flip-chip-packaged 1.8V 28dBm class-AB power amplifier with shielded concentric transformers in 32nm SoC CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 2.5GHz 32nm 0.35mm<sup>2</sup> 3.5dB NF -5dBm P1dB fully differential CMOS push-pull LNA with integrated 34dBm T/R switch and ESD protection.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 31.5dBm outphasing class-D power amplifier in 45nm CMOS with back-off efficiency enhancement by dynamic power control.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

Smart integrated temperature sensor - mixed-signal circuits and systems in 32-nm and beyond.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
An in-situ temperature-sensing interface based on a SAR ADC in 45nm LP digital CMOS for the frequency-temperature compensation of crystal oscillators.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS.
IEEE J. Solid State Circuits, 2009

A 1.05 V 1.6 mW, 0.45°C 3σ Resolution ΣΔ Based Temperature Sensor With Parasitic Resistance Compensation in 32 nm Digital CMOS Process.
IEEE J. Solid State Circuits, 2009

A 1.05V 1.6mW 0.45°C 3σ-resolution ΔΣ-based temperature sensor with parasitic-resistance compensation in 32nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 630μW zero-crossing-based ΔΣ ADC using switched-resistor current sources in 45nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

MEMS, biomedicals, and sensors.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009

2008
A 28.6dBm 65nm Class-E PA with Envelope Restoration by Pulse-Width and Pulse-Position Modulation.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 28mW Spectrum-Sensing Reconfigurable 20MHz 72dB-SNR 70dB-SNDR DT ΔΣ ADC for 802.11n/WiMAX Receivers.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS.
Proceedings of the ESSCIRC 2008, 2008

A 1.7-GHz 1.5-mW digitally-controlled FBAR oscillator with 0.03-ppb resolution.
Proceedings of the ESSCIRC 2008, 2008

2006
A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process.
IEEE J. Solid State Circuits, 2006

2005
A 5 GHz class-AB power amplifier in 90 nm CMOS with digitally-assisted AM-PM correction.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

A 0.5 mm<sup>2</sup> integrated capacitive vibration sensor with sub-10 zF/rt-Hz noise floor.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2002
Micromachined high-Q inductors in a 0.18-μm copper interconnect low-k dielectric CMOS process.
IEEE J. Solid State Circuits, 2002

2001
Micromachined high-Q inductors in 0.18 μm Cu interconnect low-K CMOS.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001


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