Graham Schelle

According to our database1, Graham Schelle authored at least 11 papers between 2003 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2016
Keynote 1 - Growing the ReConFig community through python, zynq and hardware overlays.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2016

2010
Intel nehalem processor core made FPGA synthesizable.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2008
An intelligent physical layer for cognitive radio networks.
Proceedings of the 4th Annual International Conference on Wireless Internet, 2008

Exploring FPGA network on chip implementations across various application and network loads.
Proceedings of the FPL 2008, 2008

2007
A Software Defined Radio Application Utilizing Modern FPGAs and NoC Interconnects.
Proceedings of the FPL 2007, 2007

Abstracting Modern FCCMs To Provide a Single Interface to Architectural Resources.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors.
Proceedings of the 12th International Symposium on High-Performance Computer Architecture, 2006

2005
CUSP: a modular framework for high speed network applications on FPGAs.
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004
Automated Speculation and Parallelism in High Performance Network Applications.
Proceedings of the Field Programmable Logic and Application, 2004

Mapping a domain specific language to a platform FPGA.
Proceedings of the 41th Design Automation Conference, 2004

2003
Privacy-Aware Location Sensor Networks.
Proceedings of HotOS'03: 9th Workshop on Hot Topics in Operating Systems, 2003


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