Jamison D. Collins

According to our database, Jamison D. Collins authored at least 21 papers between 1999 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2011

Bothnia: a dual-personality extension to the Intel integrated graphics driver.

Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Hong Jiang, Guei-Yuan Lueh, Thomas Piazza, Hong Wang

ACM SIGOPS Oper. Syst. Rev., 2011

AstroLIT: enabling simulation-based microarchitecture comparison between Intel® and Transmeta designs.

Guilherme Ottoni, Gautham N. Chinya, Gerolf Hoflehner, Jamison D. Collins, Amit Kumar, Ethan Schuchman, David R. Ditzel, Ronak Singhal, Hong Wang

Proceedings of the 8th Conference on Computing Frontiers, 2011

2010

Intel nehalem processor core made FPGA synthesizable.

Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang

Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010

2009

Intel® atom^TM processor core made FPGA-synthesizable.

Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Belliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang

Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

2008

CPR: Composable performance regression for scalable multiprocessor models.

Benjamin C. Lee, Jamison D. Collins, Hong Wang, David M. Brooks

Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

Processor Performance Modeling using Symbolic Simulation.

Omid Azizi, Jamison D. Collins, Dinesh Patil, Hong Wang, Mark Horowitz

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008

Merge: a programming model for heterogeneous multi-core systems.

Michael D. Linderman, Jamison D. Collins, Hong Wang, Teresa H. Meng

Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems, 2008

Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor.

Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang

Proceedings of the 17th International Conference on Parallel Architectures and Compilation Techniques, 2008

2007

EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system.

Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Hong Jiang, Xinmin Tian, Milind Girkar, Nick Y. Yang, Guei-Yuan Lueh, Hong Wang

Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation, 2007

Sequencer virtualization.

Perry H. Wang, Jamison D. Collins, Gautham N. Chinya, Bernard Lint, Asit Mallick, Koichi Yamada, Hong Wang

Proceedings of the 21th Annual International Conference on Supercomputing, 2007

2006

Multiple Instruction Stream Processor.

Richard A. Hankins, Gautham N. Chinya, Jamison D. Collins, Perry H. Wang, Ryan N. Rakvic, Hong Wang, John Paul Shen

Proceedings of the 33rd International Symposium on Computer Architecture (ISCA 2006), 2006

2004

Helper Threads via Virtual Multithreading.

Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen

IEEE Micro, 2004

Control Flow Optimization Via Dynamic Reconvergence Prediction.

Jamison D. Collins, Dean M. Tullsen, Hong Wang

Proceedings of the 37th Annual International Symposium on Microarchitecture (MICRO-37 2004), 2004

Clustered Multithreaded Architectures - Pursuing both IPC and Cycle Time.

Jamison D. Collins, Dean M. Tullsen

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

Helper threads via virtual multithreading on an experimental itanium^® 2 processor-based platform.

Perry H. Wang, Jamison D. Collins, Hong Wang, Dongkeun Kim, Bill Greene, Kai-Ming Chan, Aamir B. Yunus, Terry Sych, Stephen F. Moore, John Paul Shen

Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2002

Pointer cache assisted prefetching.

Jamison D. Collins, Suleyman Sair, Brad Calder, Dean M. Tullsen

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation.

Perry H. Wang, Hong Wang, Jamison D. Collins, Ed Grochowski, Ralph-Michael Kling, John Paul Shen

Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA'02), 2002

2001

Runtime identification of cache conflict misses: The adaptive miss buffer.

Jamison D. Collins, Dean M. Tullsen

ACM Trans. Comput. Syst., 2001

Dynamic speculative precomputation.

Jamison D. Collins, Dean M. Tullsen, Hong Wang, John Paul Shen

Proceedings of the 34th Annual International Symposium on Microarchitecture, 2001

Speculative precomputation: long-range prefetching of delinquent loads.

Jamison D. Collins, Hong Wang, Dean M. Tullsen, Christopher J. Hughes, Yong-Fong Lee, Daniel M. Lavery, John Paul Shen

Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001

1999

Hardware Identification of Cache Conflict Misses.

Jamison D. Collins, Dean M. Tullsen

Proceedings of the 32nd Annual IEEE/ACM International Symposium on Microarchitecture, 1999