Hajime Kubosawa

According to our database, Hajime Kubosawa authored at least 3 papers between 1990 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1999

A 2.5-GFLOPS, 6.5 million polygons per second, four-way VLIW geometry processor with SIMD instructions and a software bypass mechanism.

Hajime Kubosawa, Naoshi Higaki, Satoshi Ando, Hiromasa Takahashi, Yoshimi Asada, Hideaki Anbutsu, Tomio Sato, Masato Sakate, Atsuhiro Suga, Michihide Kimura, Hideo Miyake, Hiroshi Okano, Akira Asato, Yasunori Kimura, Hiroshi Nakayama, Masayoshi Kimoto, Katsuji Hirochi, Hideki Saito, Norio Kaido, Yukihiro Nakagawa, Toshio Shimada

IEEE J. Solid State Circuits, 1999

1998

A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor for multimedia applications.

Hajime Kubosawa, Hiromasa Takahashi, Satoshi Ando, Yoshimi Asada, Akira Asato, Atsuhiro Suga, Michihide Kimura, Naoshi Higaki, Hideo Miyake, Tomio Sato, Hideaki Anbutsu, Toshitaka Tsuda, Tetsuo Yoshimura, Isao Amano, Mutsuaki Kai, Shin Mitarai

IEEE J. Solid State Circuits, 1998

1990

A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations.

Akira Katsuno, Hiromasa Takahashi, Hajime Kubosawa, Tomio Sato, Atsuhiro Suga, Gensuke Goto

Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990