According to our database1, Hiromasa Takahashi authored at least 9 papers between 1990 and 2020.
Legend:Book In proceedings Article PhD thesis Other
Int. J. Game Theory, 2020
Proceedings of the International SoC Design Conference, 2011
A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme.
IEEE J. Solid State Circuits, 2010
2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read.
IEEE J. Solid State Circuits, 2008
2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 14th IEEE International Conference on Electronics, 2007
Autonomous decentralized control for formation of multiple mobile robots considering ability of robot.
IEEE Trans. Ind. Electron., 2004
The μVP 64-bit vector coprocessor: a new implementation of high-performance numerical computation.
IEEE Micro, 1993
A 64-bit floating-point processing unit with a horizontal instruction code for parallel operations.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990