Hamed Farbeh

According to our database1, Hamed Farbeh authored at least 26 papers between 2011 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2020
A System-Level Framework for Analytical and Empirical Reliability Exploration of STT-MRAM Caches.
IEEE Trans. Reliab., 2020

2019
Sleepy-LRU: extending the lifetime of non-volatile caches by reducing activity of age bits.
J. Supercomput., 2019

AWARE: Adaptive Way Allocation for Reconfigurable ECCs to Protect Write Errors in STT-RAM Caches.
IEEE Trans. Emerg. Top. Comput., 2019

RAW-Tag: Replicating in Altered Cache Ways for Correcting Multiple-Bit Errors in Tag Array.
IEEE Trans. Dependable Secur. Comput., 2019

A-CACHE: Alternating Cache Allocation to Conduct Higher Endurance in NVM-Based Caches.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

TA-LRW: A Replacement Policy for Error Rate Reduction in STT-MRAM Caches.
IEEE Trans. Computers, 2019

CLEAR: Cache Lines Error Accumulation Reduction by exploiting invisible accesses.
Microelectron. J., 2019

High performance and predictable memory controller for multicore mixed-criticality real-time systems.
IET Comput. Digit. Tech., 2019

Enhancing Reliability of STT-MRAM Caches by Eliminating Read Disturbance Accumulation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

ROBIN: incremental oblique interleaved ECC for reliability improvement in STT-MRAM caches.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
SMARTag: Error Correction in Cache Tag Array by Exploiting Address Locality.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

ORIENT: Organized interleaved ECCs for new STT-MRAM caches.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

WiP: Floating XY-YX: An Efficient Thermal Management Routing Algorithm for 3D NoCs.
Proceedings of the 2018 IEEE 16th Intl Conf on Dependable, 2018

2017
An Efficient Protection Technique for Last Level STT-RAM Caches in Multi-Core Processors.
IEEE Trans. Parallel Distributed Syst., 2017

Investigating the effects of process variations and system workloads on endurance of non-volatile caches.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

WIPE: Wearout Informed Pattern Elimination to Improve the Endurance of NVM-based Caches.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
A Cache-Assisted Scratchpad Memory for Multiple-Bit-Error Correction.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of STT-RAM Caches.
IEEE Trans. Computers, 2016

Investigating the Effects of Process Variations and System Workloads on Reliability of STT-RAM Caches.
Proceedings of the 12th European Dependable Computing Conference, 2016

2015
In-Scratchpad Memory Replication: Protecting Scratchpad Memories in Multicore Embedded Systems against Soft Errors.
ACM Trans. Design Autom. Electr. Syst., 2015

LATED: Lifetime-Aware Tag for Enduring Design.
Proceedings of the 11th European Dependable Computing Conference, 2015

2014
A data recomputation approach for reliability improvement of scratchpad memory in embedded systems.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

PSP-Cache: A low-cost fault-tolerant cache memory architecture.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
FTSPM: A Fault-Tolerant ScratchPad Memory.
Proceedings of the 2013 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2013

2012
Memory Mapped SPM: Protecting Instruction Scratchpad Memory in Embedded Systems against Soft Errors.
Proceedings of the 2012 Ninth European Dependable Computing Conference, 2012

2011
Low Cost Concurrent Error Detection for On-Chip Memory Based Embedded Processors.
Proceedings of the IEEE/IFIP 9th International Conference on Embedded and Ubiquitous Computing, 2011


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