Haroula Pournara

According to our database, Haroula Pournara authored at least 5 papers between 2002 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

A complete platform and toolset for system implementation on fine-grain reconfigurable hardware.

Vasilios Kalenteridis, Haroula Pournara, Kostas Siozios, Konstantinos Tatas, Nikolaos Vassiliadis, Ilias Pappas, George Koutroumpezis, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris

Microprocess. Microsystems, 2005

A Novel FPGA Architecture and an Integrated Framework of CAD Tools for Implementing Applications.

Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Dimitrios Soudris, Antonios Thanailakis, Spiridon Nikolaidis, Stilianos Siskos

IEICE Trans. Inf. Syst., 2005

AMDREL: a novel low-energy FPGA architecture and supporting CAD tool design flow.

Dimitrios Soudris, Spiridon Nikolaidis, Stilianos Siskos, Konstantinos Tatas, Kostas Siozios, George Koutroumpezis, Nikolaos Vassiliadis, Vasilios Kalenteridis, Haroula Pournara, Ilias Pappas, Adonios Thanailakis

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development.

Vasilios Kalenteridis, Haroula Pournara, Kostas Siozios, Konstantinos Tatas, George Koutroumpezis, Ilias Pappas, Spiridon Nikolaidis, Stilianos Siskos, D. J. Soudris, Adonios Thanailakis

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

2002

Output Waveform Evaluation of Basic Pass Transistor Structure.

Spiridon Nikolaidis, Haroula Pournara, Alexander Chatzigeorgiou

Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002