Hayato Yamaki

Orcid: 0000-0002-2521-430X

According to our database1, Hayato Yamaki authored at least 12 papers between 2016 and 2023.

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Bibliography

2023
CNFET7: An Open Source Cell Library for 7-nm CNFET Technology.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
Analyzing Performance and Power-Efficiency Variations among NVIDIA GPUs.
Proceedings of the 51st International Conference on Parallel Processing, 2022

2021
Packet Forwarding Cache of Commodity Switches for Parallel Computers.
Proceedings of the IEEE International Conference on Cluster Computing, 2021

2020
Footprint-Based DIMM Hotplug.
IEEE Trans. Computers, 2020

Effective cache replacement policy for packet processing cache.
Int. J. Commun. Syst., 2020

RPC: An Approach for Reducing Compulsory Misses in Packet Processing Cache.
IEICE Trans. Inf. Syst., 2020

Evaluating architecture-level optimization in packet processing caches.
Comput. Networks, 2020

2019
Functionally-Predefined Kernel: a Way to Reduce CNN Computation.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2019

Multi-Level Packet Processing Caches.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2018
Data prediction for response flows in packet processing cache.
Proceedings of the 55th Annual Design Automation Conference, 2018

2016
Line Replacement Algorithm for L1-scale Packet Processing Cache.
Proceedings of the Adjunct Proceedings of the 13th International Conference on Mobile and Ubiquitous Systems: Computing Networking and Services, 2016

Initial Study of Reconfigurable Neural Network Accelerators.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016


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