Tomoaki Tsumura

Orcid: 0000-0003-2004-5284

According to our database1, Tomoaki Tsumura authored at least 42 papers between 2005 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
Hisui: an Image and Video Processing Framework with Auto-optimizer.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2021

2019
Functionally-Predefined Kernel: a Way to Reduce CNN Computation.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2019

2018
Hardware Accelerated Marking for Mark & Sweep Garbage Collection.
IEICE Trans. Inf. Syst., 2018

Isolation-Safe Speculative Access Control for Hardware Transactional Memory.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

An Analysis and a Solution of False Conflicts for Hardware Transactional Memory.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Efficient Computational Scheduling of Box and Gaussian FIR Filtering for CPU Microarchitecture.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2018

2017
Initial study of a phase-aware scheduling for hardware transactional memory.
Proceedings of the IEEE Pacific Rim Conference on Communications, 2017

2016
A Waiting Mechanism with Conflict Prediction on Hardware Transactional Memory.
IEICE Trans. Inf. Syst., 2016

Highly Abstracted Video Processing Language Meets Multi-Grain Auto-Parallelization.
Proceedings of the 12th International Conference on Signal-Image Technology & Internet-Based Systems, 2016

Exclusive control for compound operations on hardware transactional memory.
Proceedings of the IEEE Nordic Circuits and Systems Conference, 2016

Evaluation of Task Mapping on Multicore Neural Network Accelerators.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

Initial Study of Reconfigurable Neural Network Accelerators.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

Hardware Supported Marking for Common Garbage Collections.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

A Concurrency Control in Hardware Transactional Memory Considering Execution Path Variation.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

Exploiting Bloom Filters for Saving Power Consumption of Auto-Memoization Processor.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

2015
An Approximate Computing Stack Based on Computation Reuse.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Eliminating Cascading Stall on Hardware Transactional Memory.
Proceedings of the Third International Symposium on Computing and Networking, 2015

Yet Another Waiting Mechanism Based on Conflict Prediction for Hardware Transactional Memory.
Proceedings of the Third International Symposium on Computing and Networking, 2015

2014
An implementation of Auto-Memoization mechanism on ARM-based superscalar processor.
Proceedings of the 2014 International Symposium on System-on-Chip, 2014

Priority-Based Conflict Resolution for Hardware Transactional Memory.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Hinting for Auto-Memoization Processor Based on Static Binary Analysis.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Automatic Code Tuning for Improving GPU Resource Utilization.
Proceedings of the Second International Symposium on Computing and Networking, 2014

Auto-Parallelization for a Video Processing Library with Content-Aware Resolution Management.
Proceedings of the Second International Symposium on Computing and Networking, 2014

2013
Content-aware precision control on a real-time video processing library.
Proceedings of the International Conference on High Performance Computing & Simulation, 2013

Reducing wasteful recurrence of aborts and stalls in hardware transactional memory.
Proceedings of the International Conference on High Performance Computing & Simulation, 2013

CAM Size Reduction Method for Auto-memorization Processor by Considering Characteristics of Loops.
Proceedings of the First International Symposium on Computing and Networking, 2013

Hardware-Supported Pointer Detection for Common Garbage Collections.
Proceedings of the First International Symposium on Computing and Networking, 2013

2012
An Automatic Host and Device Memory Allocation Method for OpenMPC.
Proceedings of the Third International Conference on Networking and Computing, 2012

An Efficient Thread Recombining at Program Phase Changes.
Proceedings of the Third International Conference on Networking and Computing, 2012

Dynamic Processing Slots Scheduling for I/O Intensive Jobs of Hadoop MapReduce.
Proceedings of the Third International Conference on Networking and Computing, 2012

A Speed-up Technique for an Auto-Memoization Processor by Reusing Partial Results of Instruction Regions.
Proceedings of the Third International Conference on Networking and Computing, 2012

2011
A GPU-Supported High-Level Programming Language for Image Processing.
Proceedings of the Seventh International Conference on Signal-Image Technology and Internet-Based Systems, 2011

Tiling with Different Spatial Resolutions for Pseudo Real-Time Video Processing Library RaVioli.
Proceedings of the Seventh International Conference on Signal-Image Technology and Internet-Based Systems, 2011

A hybrid model of speculative execution and scout threading for auto-memoization processor.
Proceedings of the 2011 International Symposium on System on Chip, 2011

Input Entry Integration for an Auto-Memoization Processor.
Proceedings of the Second International Conference on Networking and Computing, 2011

2010
A Speed-Up Technique for an Auto-Memoization Processor by Collectively Reusing Continuous Iterations.
Proceedings of the First International Conference on Networking and Computing, 2010

Proposition of Criteria for Aborting Transaction Based on Log Data Size in LogTM.
Proceedings of the First International Conference on Networking and Computing, 2010

2009
A Speculative Technique for Auto-Memoization Processor with Multithreading.
Proceedings of the 2009 International Conference on Parallel and Distributed Computing, 2009

RAVIOLI: A parallel video processing library with auto resolution adjustability.
Proceedings of the IADIS International Conference Applied Computing 2009, 2009

2007
Design and evaluation of an auto-memoization processor.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2007

2006
Design and Implementation of aWorkload Specific Simulator.
Proceedings of the Proceedings 39th Annual Simulation Symposium (ANSS-39 2006), 2006

2005
Parallel Program Debugging based on Data-Replay.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2005


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