Heiko Ehrenberg

According to our database1, Heiko Ehrenberg authored at least 7 papers between 2006 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Refreshing the JTAG Family.
Proceedings of the 41st IEEE VLSI Test Symposium, 2023

2011
IEEE Std 1581 - A standardized test access methodology for memory devices.
Proceedings of the 2011 IEEE International Test Conference, 2011

2009
Test Mode Entry and Exit Methods for IEEE P1581 compliant devices.
Proceedings of the 2009 IEEE International Test Conference, 2009

2008
IEEE P1581 drastically simplifies connectivity test for memory devices.
Proceedings of the 2008 IEEE International Test Conference, 2008

2007
IEEE P1581 can solve your board level memory cluster test problems.
Proceedings of the 2007 IEEE International Test Conference, 2007

2006
Analog Boundary-Scan Description Language (ABSDL) for Mixed-Signal Board Test.
Proceedings of the 2006 IEEE International Test Conference, 2006

IEEE P1581 - Getting More Board Test Out of Boundary Scan.
Proceedings of the 2006 IEEE International Test Conference, 2006


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