Hemesh Yasotharan

According to our database, Hemesh Yasotharan authored at least 4 papers between 2010 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

A 56-Gb/s Hybrid Silicon Photonic and 5-nm CMOS 3-D-Integrated Transceiver for Optical Compute I/O.

Ganesh Balamurugan, Parmanand Mishra, Subal Sahni, Ankur Aggarwal, Simon Forey, Andrew Gimlett, Prateek Goyal, Han Hao, Santosh Hariwan, Masum Hossain, Sejun Jeon, Narayan Kaniyur, David Lazovsky, Wonho Lee, Bengt Littmann, Raj Nagulapalli, Kevin Park, John Rollinson, Matteo Staffaroni, Prakash Thakur, Saurabh Vats, Preet Virk, Dehua Xiao, Hemesh Yasotharan, Raman Yazdani, Waleed Younis, Shifeng Yu, Phil Winterbottom

IEEE J. Solid State Circuits, April, 2026

2012

Decision Feedback Equalizer Architectures With Multiple Continuous-Time Infinite Impulse Response Filters.

Shayan Shahramian, Hemesh Yasotharan, Anthony Chan Carusone

IEEE Trans. Circuits Syst. II Express Briefs, 2012

2011

CMOS Technology Scaling Considerations for Multi-Gbps Optical Receivers With Integrated Photodetectors.

Anthony Chan Carusone, Hemesh Yasotharan, Tony Shuo-Chun Kao

IEEE J. Solid State Circuits, 2011

2010

Progress and trends in multi-Gbps optical receivers with CMOS integrated photodetectors.

Anthony Chan Carusone, Hemesh Yasotharan, Tony Shuo-Chun Kao

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010