Hiroki Wada

According to our database, Hiroki Wada authored at least 12 papers between 2000 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Lift-off Process of On-chip Micro-Gel Actuator for Cell Manipulations.

Kyoka Nakano, Hiroki Wada, Yoshiyuki Yokoyama, Takeshi Hayakawa

Proceedings of the International Symposium on Micro-NanoMechatronics and Human Science, 2022

2020

Evaluation of the Response Characteristics of On-Chip Gel Actuators for Various Single Cell Manipulations.

Hiroki Wada, Yuha Koike, Yoshiyuki Yokoyama, Takeshi Hayakawa

IEEE Robotics Autom. Lett., 2020

Quantization of Blackjack: Quantum Basic Strategy and Advantage.

Yushi Mura, Hiroki Wada

CoRR, 2020

2010

Observer-Based Robust Stabilizing Controllers Based on the Trajectory for Polytopic Uncertain Systems.

Hiroki Wada, Hidetoshi Oya, Kojiro Hagino, Yasumitsu Ebinuma

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

2007

A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.

Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada

IEICE Trans. Electron., 2007

A 2.8-V Multibit Complex Bandpass Delta-Sigma-AD Modulator in 0.18µm CMOS.

Hao San, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Akira Hayakawa, Haruo Kobayashi, Masao Hotta

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

2006

Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.

Hao San, Akira Hayakawa, Yoshitaka Jingu, Hiroki Wada, Hiroyuki Hagiwara, Kazuyuki Kobayashi, Haruo Kobayashi, Tatsuji Matsuura, Kouichi Yahagi, Junya Kudoh, Hideo Nakane, Masao Hotta, Toshiro Tsukada, Koichiro Mashiko, Atsushi Wada

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

2001

BIST Method Based on Concurrent Single-Control Testability of RTL Data Paths.

Ken-ichi Yamaguchi, Hiroki Wada, Toshimitsu Masuzawa, Hideo Fujiwara

Proceedings of the 10th Asian Test Symposium (ATS 2001), 19-21 November 2001, Kyoto, Japan, 2001

A DFT method for RTL circuits to achieve complete fault efficiency based on fixed-control testability.

Satoshi Ohtake, Shintaro Nagai, Hiroki Wada, Hideo Fujiwara

Proceedings of ASP-DAC 2001, 2001

2000

Design for Strong Testability of RTL Data Paths to Provide Complete Fault Efficiency.

Hiroki Wada, Toshimitsu Masuzawa, Kewal K. Saluja, Hideo Fujiwara

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Single-control testability of RTL data paths for BIST.

Toshimitsu Masuzawa, Minoru Izutsu, Hiroki Wada, Hideo Fujiwara

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

A non-scan DFT method at register-transfer level to achieve complete fault efficiency.

Satoshi Ohtake, Hiroki Wada, Toshimitsu Masuzawa, Hideo Fujiwara

Proceedings of ASP-DAC 2000, 2000