Hiroto Nakai

According to our database1, Hiroto Nakai authored at least 8 papers between 2008 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2017
SPH-based Fluid Simulation on GPU Using Verlet List and Subdivided Cell-Linked List.
Proceedings of the Fifth International Symposium on Computing and Networking, 2017

2015
Caching mechanisms towards single-level storage systems for Internet of Things.
Proceedings of the Symposium on VLSI Circuits, 2015

2011
1.8 V Low-Transient-Energy Adaptive Program-Voltage Generator Based on Boost Converter for 3D-Integrated NAND Flash SSD.
IEEE J. Solid State Circuits, 2011

2010
Inductor and TSV Design of 20-V Boost Converter for Low Power 3D Solid State Drive with NAND Flash Memories.
IEICE Trans. Electron., 2010

2009
A 1.8V 30nJ adaptive program-voltage (20V) generator for 3D-integrated NAND flash SSD.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Inductor design of 20-V boost converter for low power 3D solid state drive with NAND flash memories.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

Effect of resistance of TSV's on performance of boost converter for low power 3D SSD with NAND flash memories.
Proceedings of the IEEE International Conference on 3D System Integration, 2009

2008
A 70 nm 16 Gb 16-Level-Cell NAND flash Memory.
IEEE J. Solid State Circuits, 2008


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