Hiroshi Maejima

According to our database, Hiroshi Maejima authored at least 6 papers between 2006 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology.

Tsutomu Higuchi, Takuyo Kodama, Koji Kato, Ryo Fukuda, Naoya Tokiwa, Mitsuhiro Abe, Teruo Takagiwa, Yuki Shimizu, Junji Musha, Katsuaki Sakurai, Jumpei Sato, Tetsuaki Utsumi, Kazuhide Yoneya, Yasuhiro Suematsu, Toshifumi Hashimoto, Takeshi Hioka, Kosuke Yanagidaira, Masatsugu Kojima, Junya Matsuno, Kei Shiraishi, Kensuke Yamamoto, Shintaro Hayashi, Tomoharu Hashiguchi, Kazuko Inuzuka, Akio Sugahara, Mitsuaki Honma, Keiji Tsunoda, Kazumasa Yamamoto, Takahiro Sugimoto, Tomofumi Fujimura, Mizuki Kaneko, Hiroki Date, Osamu Kobayashi, Takatoshi Minamoto, Ryoichi Tachibana, Itaru Yamaguchi, Juan Lee, Venky Ramachandra, Srinivas Rajendra, Tianyu Tang, Siddhesh Darne, Jiwang Lee, Jason Li, Toru Miwa, Ryuji Yamashita, Hiroshi Sugawara, Naoki Ookuma, Masahiro Kano, Hiroyuki Mizukoshi, Yuki Kuniyoshi, Mitsuyuki Watanabe, Kei Akiyama, Hirotoshi Mori, Akira Arimizu, Yoshito Katano, Masakazu Ehama, Hiroshi Maejima, Koji Hosono, Masahiro Yoshihara

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2018

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology.

Hiroshi Maejima, Kazushige Kanda, Susumu Fujimura, Teruo Takagiwa, Susumu Ozawa, Jumpei Sato, Yoshihiko Shindo, Manabu Sato, Naoaki Kanagawa, Junji Musha, Satoshi Inoue, Katsuaki Sakurai, Naohito Morozumi, Ryo Fukuda, Yuui Shimizu, Toshifumi Hashimoto, Xu Li, Yuki Shimizu, Kenichi Abe, Tadashi Yasufuku, Takatoshi Minamoto, Hiroshi Yoshihara, Takahiro Yamashita, Kazuhiko Satou, Takahiro Sugimoto, Fumihiro Kono, Mitsuhiro Abe, Tomoharu Hashiguchi, Masatsugu Kojima, Yasuhiro Suematsu, Takahiro Shimizu, Akihiro Imamoto, Naoki Kobayashi, Makoto Miakashi, Kouichirou Yamaguchi, Sanad Bushnaq, Hicham Haibi, Masatsugu Ogawa, Yusuke Ochi, Kenro Kubota, Taichi Wakui, Dong He, Weihan Wang, Hiroe Minagawa, Tomoko Nishiuchi, Hao Nguyen, Kwang-Ho Kim, Ken Cheah, Yee Lih Koh, Feng Lu, Venky Ramachandra, Srinivas Rajendra, Steve Choi, Keyur Payak, Namas Raghunathan, Spiros Georgakis, Hiroshi Sugawara, Seungpil Lee, Takuya Futatsuyama, Koji Hosono, Noboru Shibata, Toshiki Hisada, Tetsuya Kaneko, Hiroshi Nakamura

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2009

A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate.

Yan Li, Seungpil Lee, Yupin Fong, Feng Pan, Tien-Chien Kuo, Jongmin Park, Tapan Samaddar, Hao Nguyen, Man Mui, Khin Htoo, Teruhiko Kamei, Masaaki Higashitani, Emilio Yero, Gyuwan Kwon, Phil Kliza, Jun Wan, Tetsuya Kaneko, Hiroshi Maejima, Hitoshi Shiga, Makoto Hamada, Norihiro Fujita, Kazunori Kanebako, Eugene Tam, Anne Koh, Iris Lu, Calvin Chia-Hong Kuo, Trung Pham, Jonathan Huynh, Qui Nguyen, Hardwell Chibvongodze, Mitsuyuki Watanabe, Ken Oowada, Grishma Shah, Byungki Woo, Ray Gao, Jim Chan, James Lan, Patrick Hong, Liping Peng, Debi Das, Dhritiman Ghosh, Vivek Kalluru, Sanjay Kulkarni, Raul-Adrian Cernea, Sharon Huynh, Dimitris Pantelakis, Chi-Ming Wang, Khandker Quader

IEEE J. Solid State Circuits, 2009

2008

A 70 nm 16 Gb 16-Level-Cell NAND flash Memory.

Noboru Shibata, Hiroshi Maejima, Katsuaki Isobe, Kiyoaki Iwasa, Michio Nakagawa, Masaki Fujiu, Takahiro Shimizu, Mitsuaki Honma, Satoru Hoshi, Toshimasa Kawaai, Kazunori Kanebako, Susumu Yoshikawa, Hideyuki Tabata, Atsushi Inoue, Toshiyuki Takahashi, Toshifumi Shano, Yukio Komatsu, Katsushi Nagaba, Mitsuhiko Kosakai, Noriaki Motohashi, Kazuhisa Kanazawa, Kenichi Imamiya, Hiroto Nakai, Menahem Lasser, Mark Murin, Avraham Meir, Arik Eyal, Mark Shlick

IEEE J. Solid State Circuits, 2008

A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate.

Yan Li, Seungpil Lee, Yupin Fong, Feng Pan, Tien-Chien Kuo, Jong Park, Tapan Samaddar, Hao Nguyen, Man Mui, Khin Htoo, Teruhiko Kamei, Masaaki Higashitani, Emilio Yero, Gyuwan Kwon, Phil Kliza, Jun Wan, Tetsuya Kaneko, Hiroshi Maejima, Hitoshi Shiga, Makoto Hamada, Norihiro Fujita, Kazunori Kanebako, Eugene Tam, Anne Koh, Iris Lu, Calvin Chia-Hong Kuo, Trung Pham, Jonathan Huynh, Qui Nguyen, Hardwell Chibvongodze, Mitsuyuki Watanabe, Ken Oowada, Grishma Shah, Byungki Woo, Ray Gao, Jim Chan, James Lan, Patrick Hong, Liping Peng, Debi Das, Dhritiman Ghosh, Vivek Kalluru, Sanjay Kulkarni, Raul Cernea, Sharon Huynh, Dimitris Pantelakis, Chi-Ming Wang, Khandker Quader

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006

A 146-mm² 8-gb multi-level NAND flash memory with 70-nm CMOS technology.

Takahiko Hara, Koichi Fukuda, Kazuhisa Kanazawa, Noboru Shibata, Koji Hosono, Hiroshi Maejima, Michio Nakagawa, Takumi Abe, Masatsugu Kojima, Masaki Fujiu, Yoshiaki Takeuchi, Kazumi Amemiya, Midori Morooka, Teruhiko Kamei, Hiroaki Nasu, Chi-Ming Wang, Kiyofumi Sakurai, Naoya Tokiwa, Hiroko Waki, Tohru Maruyama, Susumu Yoshikawa, Masaaki Higashitani, Tuan D. Pham, Yupin Fong, Toshiharu Watanabe

IEEE J. Solid State Circuits, 2006