Michio Nakagawa

According to our database1, Michio Nakagawa authored at least 4 papers between 2006 and 2016.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
A Low Power 64 Gb MLC NAND-Flash Memory in 15 nm CMOS Technology.
IEEE J. Solid State Circuits, 2016

2015

2008
A 70 nm 16 Gb 16-Level-Cell NAND flash Memory.
IEEE J. Solid State Circuits, 2008

2006
A 146-mm<sup>2</sup> 8-gb multi-level NAND flash memory with 70-nm CMOS technology.
IEEE J. Solid State Circuits, 2006


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