Holger Mandry

Orcid: 0000-0002-2575-2829

Affiliations:
  • University of Ulm, Germany


According to our database1, Holger Mandry authored at least 13 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A Feasibility Study on a Switched-Capacitor Based PUF in 28 nm Technology.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2022
PUF-Entropy Extraction of DAC Intersymbol-Interference using Continuous-Time Delta-Sigma ADCs.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

A Wireless Headstage Prototype Based on a Neurorecorder IC.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2022

2021
A Multilevel Coding Scheme for Multi-Valued Physical Unclonable Functions.
IEEE Trans. Inf. Forensics Secur., 2021

Using Polynomial Interpolation for Reproducing Multi-Valued Responses of Physical Unclonable Functions on FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Normalization and Multi-Valued Symbol Extraction From RO-PUFs for Enhanced Uniform Probability Distributions.
IEEE Trans. Circuits Syst., 2020

Comparison of Measurement and Readout Strategies for RO-PUFs on Xilinx Zynq-7000 SoC FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Extracting Weak PUFs from Differential Nonlinearity of Digital-to-Analog Converters.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Live Demonstration: Generating FPGA Fingerprints Utilizing Full-Chip Characterization with Ring-Oscillator PUFs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
An Evaluation Study of Various Excitation Signals for Electrical Impedance Spectroscopy.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Modular PUF Coding Chain with High-Speed Reed-Muller Decoder.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Finite Gain-Bandwidth of Q Enhancement in Bandpass CT ΣΔ Modulator and Compensation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019


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