Hongbiao Wu

According to our database, Hongbiao Wu authored at least 3 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

A 9T SRAM Computation-in-Memory Architecture With High-Precision MAC, Enhanced Bitline Voltage Margin, and Improved Frequency Performance Over Conventional Architectures.

Hongbiao Wu, Zhi-Ting Lin

IEEE Trans. Very Large Scale Integr. Syst., January, 2026

2025

High-throughput in-memory bitwise computing based on a coupled dual-SRAM array with independent operands.

Hongbiao Wu, Zhiting Lin, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng

Int. J. Circuit Theory Appl., April, 2025

2022

In-Memory Multibit Multiplication Based on Bitline Shifting.

Jin Zhang, Zhiting Lin, Xiulong Wu, Zhongzhen Tong, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Hongbiao Wu, Junning Chen

IEEE Trans. Circuits Syst. II Express Briefs, 2022