Zhongzhen Tong

According to our database, Zhongzhen Tong authored at least 23 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2026

BaM-CIM: A High Throughput Booth Algorithm-Based In-MRAM Computing Macro Using Hybrid VGSOT-MTJ/GAA-CNTFET.

Chenghang Li, Zhongzhen Tong, Yulong Qiu, Jiye Yao, Chao Wang, Zhaohao Wang, Xiaoyang Lin, Weisheng Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026

A CIM Macro Embedded With Sign Operations for Parallel Signed Multibit Multiplication-and-Accumulation Using Hybrid Cell Array.

Jin Zhang, Zhongzhen Tong, Qiang Zhao, Chunyu Peng, Wenjuan Lu, Jian Zhou, Xiaoxiao Chen, Zhiting Lin, Xiulong Wu

IEEE Trans. Very Large Scale Integr. Syst., March, 2026

An FD-SOI-Based Compact In-Pixel Computing Architecture Enabling Real-Time Feature Extraction.

Yijiao Wang, Jiayao Wu, Yaqi Wang, Zhongzhen Tong, Xinrui Duan, Yiming Shi, Wen Shi, Weisheng Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026

A Fully-Parallel Digital MRAM Computing-in-Memory Macro Featuring a High-Efficient Dynamic Adder Tree and Bit-Splitting MAC.

Zhongzhen Tong, Jiye Yao, Shaohui Ma, Yulong Qiu, Zhaohao Wang, Amara Amara, Xiaoyang Lin

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

Multi-Retention and Bit-Level Approximate STT-MRAM for High-Efficiency AI Applications.

Yulong Qiu, Chao Wang, Weimeng Zhao, Zhongzhen Tong, Zhaohao Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

Highly Energy-Efficient In-Memory Computing Architecture Based on VGSOT-MRAM for Reconfigurable BNN/TNN Acceleration.

Qihang Gao, Chao Wang, Chenghang Li, Zhongzhen Tong, Zhaohao Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

A Low Power and High Reliability Nonvolatile SRAM Using In-Plane VGSOT-MRAM with Pre-Charge Restore Scheme.

Xiaoyang Xu, Chenyi Wang, Zhongzhen Tong, Mingche Li, Weimeng Zhao, Zhongkui Zhang, Yaling Wang, Chao Wang, Zhaohao Wang

Proceedings of the Design, Automation & Test in Europe Conference, 2026

Input Sparsity Aware In-Memory Computing Macro Based on SOT-MRAM Multi-Level Cell for Efficient Deep Neural Network Acceleration.

Chao Wang, Qihang Gao, Xianzeng Guo, Zhongzhen Tong, Zhaohao Wang, Weisheng Zhao

Proceedings of the Design, Automation & Test in Europe Conference, 2026

2025

A Self-Decryption Pass Transistor Logic-Based In-MRAM Computing Macro Using Hybrid VGSOT-MTJ/GAA-CNTFET.

Zhongzhen Tong, Sifan Sun, Kaili Zhang, Chenghang Li, Jiye Yao, Yulong Qiu, Chao Wang, Zhaohao Wang, Ke Zhang, Amara Amara, Xiaoyang Lin, Weisheng Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2025

In-MRAM Computing Based on Complementary-Sensing Time-Based Readout Circuit Using Hybrid VGSOT-MTJ/GAA-CNTFET.

Zhongzhen Tong, Sifan Sun, Kaili Zhang, Chenghang Li, Daming Zhou, Zhaohao Wang, Xiaoyang Lin, Weisheng Zhao

IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

A Novel Radiation-Hardened, Speed and Power Optimized Nonvolatile Latch for Aerospace Applications.

Shixing Li, Chenyi Wang, Zhongzhen Tong, Chao Wang, Bi Wang, Zhaohao Wang

IEEE Trans. Circuits Syst. II Express Briefs, January, 2025

Approximate SOT-MRAM for Neural Network Acceleration with Superior Read Performance.

Yulong Qiu, Chao Wang, Zhongzhen Tong, Siyuan Cheng, Yueting Li, Zhaohao Wang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

2024

BSTCIM: A Balanced Symmetry Ternary Fully Digital In-MRAM Computing Macro for Energy Efficiency Neural Network.

Zhongzhen Tong, Chenghang Li, Chao Wang, Suteng Zhao, Qianyong Peng, Zhenyu Yan, Siqi Zhang, Daming Zhou, Zhaohao Wang, Xiaoyang Lin, Weisheng Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2024

A Computing In-Memory Multibit Multiplication Based on Decoupling and In-Array Storing.

Jin Zhang, Zhongzhen Tong, Hao Wang, Xin Wang, Qiang Zhao, Jian Zhou, Jiaqun Wang, Zhiting Lin, Xiulong Wu

IEEE Trans. Circuits Syst. I Regul. Pap., August, 2024

A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation.

Kaili Zhang, Zhongzhen Tong, Xinxin Liang, Chengzhi Wang, You Wang, Yue Zhang, Weisheng Zhao, Lang Zeng, Deming Zhang

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET.

Zhongzhen Tong, Yilin Xu, Yunlong Liu, Xinrui Duan, Hao Tang, Suteng Zhao, Chenghang Li, Zhiting Lin, Xiulong Wu, Zhaohao Wang, Xiaoyang Lin

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

Configurable in-memory computing architecture based on dual-port SRAM.

Yue Zhao, Yunlong Liu, Jian Zheng, Zhongzhen Tong, Xin Wang, Runru Yu, Xiulong Wu, Yongliang Zhou, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin

Microelectron. J., 2024

2023

In-Memory Transposable Multibit Multiplication Based on Diagonal Symmetry Weight Block.

Zhongzhen Tong, Yue Zhao, Jin Zhang, Zhiting Lin, Xiaoyang Lin, Xiulong Wu

IEEE Trans. Very Large Scale Integr. Syst., September, 2023

A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store.

Zhiting Lin, Shaoying Zhang, Qian Jin, Jianping Xia, Yunwei Liu, Kefeng Yu, Jian Zheng, Xiaoming Xu, Xing Fan, Ke Li, Zhongzhen Tong, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao

IEEE Trans. Very Large Scale Integr. Syst., June, 2023

In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations.

Zhiting Lin, Zhongzhen Tong, Fangming Wang, Jin Zhang, Yue Zhao, Peng Sun, Tian Xu, Cheng Zhang, Xingwei Li, Xiulong Wu, Wenjuan Lu, Chunyu Peng, Qiang Zhao, Junning Chen

IEEE J. Solid State Circuits, May, 2023

2022

Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing.

Yue Zhao, Zhiting Lin, Xiulong Wu, Qiang Zhao, Wenjuan Lu, Chunyu Peng, Zhongzhen Tong, Junning Chen

IEEE Trans. Very Large Scale Integr. Syst., 2022

In-Memory Multibit Multiplication Based on Bitline Shifting.

Jin Zhang, Zhiting Lin, Xiulong Wu, Zhongzhen Tong, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Hongbiao Wu, Junning Chen

IEEE Trans. Circuits Syst. II Express Briefs, 2022

An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset.

Yue Zhao, Jinkai Wang, Zhongzhen Tong, Xiulong Wu, Chunyu Peng, Wenjuan Lu, Qiang Zhao, Zhiting Lin

Microelectron. J., 2022