Zhongzhen Tong

Orcid: 0000-0001-8907-939X

According to our database1, Zhongzhen Tong authored at least 8 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
A Charge-Domain Compute-In-Memory Macro With Cell-Embedded DA Conversion and Two-Stage AD Conversion for Bit-Scalable MAC Operation.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023
In-Memory Transposable Multibit Multiplication Based on Diagonal Symmetry Weight Block.
IEEE Trans. Very Large Scale Integr. Syst., September, 2023

A Fully Digital SRAM-Based Four-Layer In-Memory Computing Unit Achieving Multiplication Operations and Results Store.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023

In Situ Storing 8T SRAM-CIM Macro for Full-Array Boolean Logic and Copy Operations.
IEEE J. Solid State Circuits, May, 2023

2022
Configurable Memory With a Multilevel Shared Structure Enabling In-Memory Computing.
IEEE Trans. Very Large Scale Integr. Syst., 2022

In-Memory Multibit Multiplication Based on Bitline Shifting.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

An offset cancellation technique for SRAM sense amplifier based on relation of the delay and offset.
Microelectron. J., 2022


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