Hsiang-Huang Wu

According to our database, Hsiang-Huang Wu authored at least 15 papers between 2007 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Hierarchical Transfer Convolutional Neural Networks for Image Classification.

Xishuang Dong, Hsiang-Huang Wu, Yuzhong Yan, Lijun Qian

Proceedings of the 2019 IEEE International Conference on Big Data (IEEE BigData), 2019

2018

IoT Devices Fingerprinting Using Deep Learning.

Hossein Jafari, Oluwaseyi Omotere, Damilola Adesina, Hsiang-Huang Wu, Lijun Qian

Proceedings of the 2018 IEEE Military Communications Conference, 2018

Integration of Convolutional Neural Network and Thermal Images into Soil Moisture Estimation.

Remilekun Sobayo, Hsiang-Huang Wu, Ram L. Ray, Lijun Qian

Proceedings of the 1st International Conference on Data Intelligence and Security, 2018

2017

Generalization of Large-Scale Data Processing in One MapReduce Job for Coarse-Grained Parallelism.

Hsiang-Huang Wu, Chien-Min Wang

Int. J. Parallel Program., 2017

Scalable and Efficient Construction of Suffix Array with MapReduce and In-Memory Data Store System.

Hsiang-Huang Wu, Chien-Min Wang, Hsuan-Chi Kuo, Wei-Chun Chung, Jan-Ming Ho

CoRR, 2017

Implementing Deep Neural Networks on Fresh Breeze.

Jack B. Dennis, Lei Huang, Willie Y.-P. Lim, Hsiang-Huang Wu, Yuzhong Yan

Proceedings of the Parallel Computing is Everywhere, 2017

2014

Multiple Two-Phase Data Processing with MapReduce.

Hsiang-Huang Wu, Tse-Chen Yeh, Chien-Min Wang

Proceedings of the 2014 IEEE 7th International Conference on Cloud Computing, Anchorage, AK, USA, June 27, 2014

2013

Modeling and Mapping of Optimized Schedules for Embedded Signal Processing Systems.

Hsiang-Huang Wu

PhD thesis, 2013

2012

Design and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format.

Chung-Ching Shen, Shenpei Wu, Nimish Sane, Hsiang-Huang Wu, William Plishker, Shuvra S. Bhattacharyya

IEEE Trans. Multim., 2012

2011

A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs.

Hsiang-Huang Wu, Chung-Ching Shen, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

A design tool for efficient mapping of multimedia applications onto heterogeneous platforms.

Chung-Ching Shen, Hsiang-Huang Wu, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya

Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011

Modeling and optimization of dynamic signal processing in resource-aware sensor networks.

Shuvra S. Bhattacharyya, William Plishker, Nimish Sane, Chung-Ching Shen, Hsiang-Huang Wu

Proceedings of the 8th IEEE International Conference on Advanced Video and Signal-Based Surveillance, 2011

2010

Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs.

Hsiang-Huang Wu, Hojin Kee, Nimish Sane, William Plishker, Shuvra S. Bhattacharyya

Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010

2009

A comprehensive TCAM test scheme: An optimized test algorithm considering physical layout and combining scan test with at-speed BIST design.

Hsiang-Huang Wu, Jih-Nung Lee, Ming-Cheng Chiang, Po-Wei Liu, Chi-Feng Wu

Proceedings of the 2009 IEEE International Test Conference, 2009

2007

CAMEL: An Efficient Fault Simulator with Coupling Fault Simulation Enhancement for CAMs.

Hsiang-Huang Wu, Jin-Fu Li, Chi-Feng Wu, Cheng-Wen Wu

Proceedings of the 16th Asian Test Symposium, 2007