Hsin-I Wu

According to our database, Hsin-I Wu authored at least 20 papers between 2012 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

An Adaptive High-Performance Quantization Approach for Resource-Constrained CNN Inference.

Hsu-Hsun Chin, Ren-Song Tsay, Hsin-I Wu

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

An Effective Parallel Program Debugging Approach Based on Timing Annotation.

Yun Chang, Hsin-I Wu, Ren-Song Tsay

CoRR, 2021

A High-Performance Adaptive Quantization Approach for Edge CNN Applications.

Hsu-Hsun Chin, Ren-Song Tsay, Hsin-I Wu

CoRR, 2021

2020

A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions.

Hsin-I Wu, Da-Yi Guo, Ren-Song Tsay

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

A Very Compact Embedded CNN Processor Design Based on Logarithmic Computing.

Tsung-Ying Lu, Hsu-Hsun Chin, Hsin-I Wu, Ren-Song Tsay

CoRR, 2020

CORONA: A k-COnnected RObust Interconnection Network Generation Algorithm.

Hsin-I Wu, Ren-Song Tsay, Fong-Yuan Chang

Proceedings of the 2020 International Symposium on VLSI Design, Automation and Test, 2020

VIRA: a virtualization assisted deterministic system-level simulations.

Hsin-I Wu, Ren-Song Tsay, Hsu-Hsun Chin

Proceedings of the SAC '20: The 35th ACM/SIGAPP Symposium on Applied Computing, online event, [Brno, Czech Republic], March 30, 2020

A Heuristic Region-based Concurrency Bug Testing Approach.

Kuo-Cheng Chin, Ren-Song Tsay, Hsin-I Wu

Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2020

Designing A Compact Convolutional Neural Network Processor on Embedded FPGAs.

Yin-Chun Ling, Hsu-Hsun Chin, Hsin-I Wu, Ren-Song Tsay

Proceedings of the IEEE Global Conference on Artificial Intelligence and Internet of Things, 2020

A Pipeline-Based Scheduler for Optimizing Latency of Convolution Neural Network Inference over Heterogeneous Multicore Systems.

Hsin-I Wu, Da-Yi Guo, Hsu-Hsun Chin, Ren-Song Tsay

Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2018

A highly efficient full-system virtual prototype based on virtualization-assisted approach.

Hsin-I Wu, Chi-Kang Chen, Tsung-Ying Lu, Ren-Song Tsay

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

LiCompass: Extracting orientation from polarized light.

Yu-Lin Wei, Hsin-I Wu, Han-Chung Wang, Hsin-Mu Tsai, Kate Ching-Ju Lin, Rayana Boubezari, Hoa Le Minh, Zabih Ghassemlooy

Proceedings of the 2017 IEEE Conference on Computer Communications, 2017

2016

An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices.

Hsuan-Man Chen, Chi-Kang Chen, Hsin-I Wu, Ren-Song Tsay

Proceedings of the 2016 IEEE International Conference on Healthcare Informatics, 2016

Poster Paper: An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices.

Hsuan-Man Chen, Chi-Kang Chen, Hsin-I Wu, Ren-Song Tsay

Proceedings of the 2016 IEEE International Conference on Healthcare Informatics, 2016

An accurate and flexible early memory system power evaluation approach using a microcomponent method.

Chi-Kang Chen, Hsin-I Wu, Chi-Ting Hsiao, Ren-Song Tsay

Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016

2015

Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations.

Jyun-Hao Chang, Hsin-I Wu, Hsien-Lun Pai, Ren-Song Tsay, Wai-Kei Mak

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

RollingLight: Enabling Line-of-Sight Light-to-Camera Communications.

Hui-Yu Lee, Hao-Min Lin, Yu-Lin Wei, Hsin-I Wu, Hsin-Mu Tsai, Kate Ching-Ju Lin

Proceedings of the 13th Annual International Conference on Mobile Systems, 2015

Automatic timing-coherent transactor generation for mixed-level simulations.

Li-Chun Chen, Hsin-I Wu, Ren-Song Tsay

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2013

A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations.

Fan-Wei Yu, Bo-Han Zeng, Yu-Hung Huang, Hsin-I Wu, Che-Rung Lee, Ren-Song Tsay

Proceedings of the Design, Automation and Test in Europe, 2013

2012

A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation.

Yu-Hung Huang, Yi-Shan Lu, Hsin-I Wu, Ren-Song Tsay

Proceedings of the 49th Annual Design Automation Conference 2012, 2012