Ioannis Koutras

Orcid: 0000-0001-5714-8637

According to our database1, Ioannis Koutras authored at least 10 papers between 2010 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
On supporting rapid prototyping of embedded systems with reconfigurable architectures.
Integr., 2017

Algorithmic and memory optimizations on multiple application mapping onto FPGAs.
Proceedings of the 2017 International Conference on Embedded Computer Systems: Architectures, 2017

2016
Improving Dynamic Memory Allocation on Many-Core Embedded Systems With Distributed Shared Memory.
IEEE Embed. Syst. Lett., 2016

Statistical-based anomaly detection for NFV services.
Proceedings of the 2016 IEEE Conference on Network Function Virtualization and Software Defined Networks (NFV-SDN), 2016

An integrating framework for efficient NFV monitoring.
Proceedings of the IEEE NetSoft Conference and Workshops, 2016

2013
Power-aware dynamic memory management on many-core platforms utilizing DVFS.
ACM Trans. Embed. Comput. Syst., 2013

2012
Adaptive dynamic memory allocators by estimating application workloads.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Efficient Memory Allocations on a Many-Core Accelerator.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012

2010
BIT-width exploration over 3D architectures using high-level synthesis.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Construction of dual mode components for reconfiguration aware high-level synthesis.
Proceedings of the Design, Automation and Test in Europe, 2010


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