Jean-Michel Chabloz

According to our database, Jean-Michel Chabloz authored at least 11 papers between 2009 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Low-Latency Maximal-Throughput Communication Interfaces for Rationally Related Clock Domains.

Jean-Michel Chabloz, Ahmed Hemani

IEEE Trans. Very Large Scale Integr. Syst., 2014

2013

Power-aware dynamic memory management on many-core platforms utilizing DVFS.

Iraklis Anagnostopoulos, Jean-Michel Chabloz, Ioannis Koutras, Alexandros Bartzas, Ahmed Hemani, Dimitrios Soudris

ACM Trans. Embed. Comput. Syst., 2013

2012

Low-Latency No-Handshake GALS Interfaces for Fast-Receiver Links.

Jean-Michel Chabloz, Ahmed Hemani

Proceedings of the 25th International Conference on VLSI Design, 2012

2011

A GALS Network-on-Chip based on rationally-related frequencies.

Jean-Michel Chabloz, Ahmed Hemani

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers.

Jean-Michel Chabloz, Ahmed Hemani

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010

An Algorithm for Constructing a Fastest Galois NLFSR Generating a Given Sequence.

Jean-Michel Chabloz, Shohreh Sharif Mansouri, Elena Dubrova

Proceedings of the Sequences and Their Applications - SETA 2010, 2010

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach.

Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

The MOSART Mapping Optimization for Multi-Core ARchiTectures.

Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, Philippe Martin

Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

Distributed DVFS using rationally-related frequencies and discrete voltage levels.

Jean-Michel Chabloz, Ahmed Hemani

Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

Lowering the latency of interfaces for rationally-related frequencies.

Jean-Michel Chabloz, Ahmed Hemani

Proceedings of the 28th International Conference on Computer Design, 2010

2009

A flexible communication scheme for rationally-related clock frequencies.

Jean-Michel Chabloz, Ahmed Hemani

Proceedings of the 27th International Conference on Computer Design, 2009