Ioannis Messaris

Orcid: 0000-0002-4286-6553

According to our database1, Ioannis Messaris authored at least 37 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
High Frequency Response of Non-Volatile Memristors.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023

A Simplified Variability-Aware VCM Memristor Model for Efficient Circuit Simulation.
Proceedings of the 19th International Conference on Synthesis, 2023

Multitasking and Memcomputing in Memristor Cellular Nonlinear Networks: Insights into the Underlying Mechanisms.
Proceedings of the 19th International Conference on Synthesis, 2023

Stochastic template in cellular nonlinear networks modeling memristor induced synaptic noise.
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

Exploration of Bistable Oscillatory Dynamics in a Memristor from Forschungszentrum Jülich.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

DC Characterization of Numerically Efficient and Stable Locally Active Device Models.
Proceedings of the 12th International Conference on Modern Circuits and Systems Technologies, 2023

Analytical Derivation of Sharp-Edge-of-Chaos Domain in a One-Dimensional Memristor Array.
Proceedings of the IEEE International Conference on Metrology for eXtended Reality, 2023

Local Fading Memory Effects in a Tantalum Oxide ReRAM Cell from Hewlett Packard Labs.
Proceedings of the IEEE International Conference on Metrology for eXtended Reality, 2023

Dynamics of a Memristive Bridge with Valence Change Mechanism (VCM) Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Design and Analysis of Isolated Voltage-Mode Memristor Cellular Nonlinear Network Cells.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
Toward Simplified Physics-Based Memristor Modeling of Valence Change Mechanism Devices.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Compact and Continuous Reformulation of the Strachan TaO<sub>x</sub> Memristor Model With Improved Numerical Stability.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Analytical Study of the Fading Memory Phenomenon in a TaOx Memristor Model.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
NbO<sub>2</sub>-Mott Memristor: A Circuit- Theoretic Investigation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Analytical Investigation of Pattern Formation in an M-CNN with Locally Active NbOx Memristors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Theoretical Foundations of Memristor Cellular Nonlinear Networks: Memcomputing With Bistable-Like Memristors.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Theoretical Foundations of Memristor Cellular Nonlinear Networks: Stability Analysis With Dynamic Memristors.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Image Mem-Processing Bio-Inspired Cellular Arrays with Bistable and Analogue Dynamic Memristors.
Proceedings of the 9th International Conference on Modern Circuits and Systems Technologies, 2020

A Simplified Model for a NbO2 Mott Memristor Physical Realization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Image Processing by Cellular Memcomputing Structures.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Multi-tasking and Memcomputing with Memristor Cellular Nonlinear Networks.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

Implementation of Logical and Memory Functions with Memristor Cellular Nonlinear Networks.
Proceedings of the European Conference on Circuit Theory and Design, 2020

2019
Mem-Computing CNNs with Bistable-Like Memristors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Theory of Cellular Nonlinear Networks with Analogue Dynamic Memristors.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

2018
A Data-Driven Verilog-A ReRAM Model.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

An Evaluation of the Equivalent Inverter Modeling Approach.
Circuits Syst. Signal Process., 2018

Evaluation of an Artificial Neural Network Approach for Timing Modeling of CMOS Gates.
Proceedings of the 28th International Symposium on Power and Timing Modeling, 2018

Equivalent inverter-based characterization tool for nano-scale CMOS digital cells: Non-linear-delay-models evaluation.
Proceedings of the 7th International Conference on Modern Circuits and Systems Technologies, 2018

CNNs with bistable-like non-volatile memristors: a novel mem-computing paradigm for the IoT era.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
A compact Verilog-A ReRAM switching model.
CoRR, 2017

An analytical delay model for ReRAM memory cells.
Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

Live demonstration: A TiO2 ReRAM parameter extraction method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2016
Hot carrier degradation modeling of short-channel n-FinFETs suitable for circuit simulators.
Microelectron. Reliab., 2016

2015
Modeling leakage currents of different CMOS cells by the power contributors method.
Proceedings of the 19th Panhellenic Conference on Informatics, 2015

A study for replacing CMOS gates by equivalent inverters.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
An analytical model for the CMOS inverter.
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Variability of nanoscale triple gate FinFETs: Prediction and analysis method.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014


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