Ishan Mishra

Orcid: 0009-0007-5275-5367

According to our database1, Ishan Mishra authored at least 10 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
A 40 Gb/s Adaptive CTLE Using a Sub-Sampled PAM-4 Clock Recovery Circuit in 65nm CMOS.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Recognize Any Surgical Object: Unleashing the Power of Weakly-Supervised Data.
Proceedings of the Thirteenth International Conference on Learning Representations, 2025

2024
Client Contribution Normalization for Enhanced Federated Learning.
CoRR, 2024

A Compact Low-Power 29 Gb/s Pseudo Random Quaternary Sequence Generator in 65 nm CMOS.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

Power Integrity Analysis for Interoperability of BoW Chiplet Interfaces.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

Probabilistic Trust Intervals for Out of Distribution Detection.
Proceedings of the 8th International Conference on Data Science and Management of Data (12th ACM IKDD CODS and 30th COMAD), 2024

2023
Distilling Calibrated Student from an Uncalibrated Teacher.
CoRR, 2023

A Linear Ratioed Impedance and Driver-Based True Full-Duplex IO with Background Self-Interference Cancellation.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Knowledge Distillation with Ensemble Calibration.
Proceedings of the Fourteenth Indian Conference on Computer Vision, 2023

2022
BAFL: Federated Learning with Base Ablation for Cost Effective Communication.
Proceedings of the 26th International Conference on Pattern Recognition, 2022


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