Jaime Jiménez

Orcid: 0000-0002-3804-678X

According to our database1, Jaime Jiménez authored at least 57 papers between 1986 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems.
IEEE Trans. Reliab., March, 2024

High Performance Platform to Detect Faults in the Smart Grid by Artificial Intelligence Inference.
IEEE Trans. Smart Grid, January, 2024

2023
Next-Generation Pedal: Integration of Sensors in a Braking Pedal for a Full Brake-by-Wire System.
Sensors, July, 2023

Timing requirements on multi-processing and reconfigurable embedded systems with multiple environments.
Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022
Embedded firewall for on-chip bus transactions.
Comput. Electr. Eng., 2022

High-Performance Computing Architecture for Sample Value Processing in the Smart Grid.
IEEE Access, 2022

Design and development of an IoT device provided with a voice interface to improve treatment adherence in polymedicated patients.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Analysis and Deployment of Applications Acceleration Environment for Xilinx Hardware-Accelerated Platforms.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Accelerating Video Analytic Processing on Edge Intelligence.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

The influence of virtualization on real-time systems' interrupts in embedded SoC platforms.
Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021
Fast and efficient address search in System-on-a-Programmable-Chip using binary trees.
Comput. Electr. Eng., 2021

A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems.
IEEE Access, 2021

Evaluating the OpenAMP framework in real-time embedded SoC platforms.
Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

2020
IETF Protocol Suite for the Internet of Things: Overview and Recent Advancements.
IEEE Commun. Stand. Mag., 2020

Synchronizing NTP Referenced SCADA Systems Interconnected by High-availability Networks.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Analysing the interference of Xen hypervisor in the network speed.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Electronic control board for student Rocket.
Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019
Interactive System for Language and Communication Stimulation Directed to Young Children.
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019

Automated Discovery of CoAP-enabled IoT devices.
Proceedings of the Eleventh International Conference on Ubiquitous and Future Networks, 2019

Fast and efficient FPGA prototype system for embedded control algorithms in electric traction.
Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018
Report from the Internet of Things (IoT) Semantic Interoperability (IOTSI) Workshop 2016.
RFC, October, 2018

SEU emulation in industrial SoCs combining microprocessor and FPGA.
Reliab. Eng. Syst. Saf., 2018

System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS.
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

Time Analysis of the Integration of Simulators for an AmI Environment.
Proceedings of the Distributed Computing and Artificial Intelligence, 2018

2017
On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems.
IEEE Trans. Smart Grid, 2017

ELIoT: Design of an emulated IoT platform.
Proceedings of the 28th IEEE Annual International Symposium on Personal, 2017

A microwatt front end and asynchronous ADC for sparse biopotential acquisition.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

2016
Enhancing Lightweight M2M Operations for Managing IoT Gateways.
Proceedings of the 2016 IEEE International Conference on Internet of Things (iThings) and IEEE Green Computing and Communications (GreenCom) and IEEE Cyber, 2016

Intelligent gateway for Industry 4.0-compliant production.
Proceedings of the IECON 2016, 2016

2015
Gateway selection in capillary networks.
Proceedings of the 5th International Conference on the Internet of Things, 2015

2014
FTL-CFree: A Fuzzy Real-Time Language for Runtime Verification.
IEEE Trans. Ind. Informatics, 2014

Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs.
IEEE Trans. Ind. Electron., 2014

Study on communication technologies for the optimal operation of smart grids.
Trans. Emerg. Telecommun. Technol., 2014

M3: Machine-to-Machine Management Framework.
Proceedings of the SENSORNETS 2014 - Proceedings of the 3rd International Conference on Sensor Networks, Lisbon, Portugal, 7, 2014

Cost-effective redundancy for ethernet train communications using HSR.
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

2013
Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor.
Proceedings of the IECON 2013, 2013

2012
Fast and accurate Single Bit Error injection into SRAM Based FPGAs.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011
I2CSec: A secure serial Chip-to-Chip communication protocol.
J. Syst. Archit., 2011

NoCmodel: An extensible framework for Network-on-Chips modeling.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Robustness Analysis of Different AES Implementations on SRAM Based FPGAs.
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS.
Proceedings of the 2011 International Symposium on System on Chip, 2011

2010
Reconfigurable Multiprocessor Systems: A Review.
Int. J. Reconfigurable Comput., 2010

2009
Overview of FPGA-Based Multiprocessor Systems.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.
Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009

AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.
Proceedings of the Reconfigurable Computing: Architectures, 2009

2008
Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes.
Proceedings of the Autonomic and Trusted Computing, 5th International Conference, 2008

2007
Design of a Master Device for the Multifunction Vehicle Bus.
IEEE Trans. Veh. Technol., 2007

Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.
J. Syst. Archit., 2007

GPS-less location algorithm for wireless sensor networks.
Comput. Commun., 2007

2006
Comparison of two designs for the multifunction vehicle bus.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Modifying Slots in Test Vectors to Validate Decoders of a Train Network.
Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006

Node Synchronization in Wireless Sensor Networks.
Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006

2004
Doppler Location Algorithm for Wireless Sensor Networks.
Proceedings of the International Conference on Wireless Networks, 2004

2003
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

1988
The S & T potential of Mexico and Hungary.
Scientometrics, 1988

1986
Scientific research areas in Mexico: Growth patterns in the late seventies.
Scientometrics, 1986


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