Armando Astarloa

According to our database, Armando Astarloa authored at least 70 papers between 2003 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems.

Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, José Ángel Araujo, Jaime Jiménez

IEEE Trans. Reliab., March, 2024

2023

SiliconBurmuin: A Horizon Europe propelled Neurocomputing Initiative in the Basque Country.

Xabier Iturbe, Xabier Alberdi, Ander Aramburu, Armando Astarloa, Iñigo Barandiaran, Koldo Basterretxea, Angélica Dávila, Asier Erramuzpe, Iñigo Gabilondo, Garikoitz Lerma-Usabiaga, Lisandro Gabriel Monsalve, Libe Mori, Javier Navaridas, Jose Antonio Pascual, Joaquin Piriz, Serafim Rodrigues, Oscar Seijo, Ander Soraluze, Edgar Soria, Ignacio Torres, Nerea Uriarte, Juan Luis Valerdi

Proceedings of the 49th Euromicro Conference on Software Engineering and Advanced Applications, 2023

Time-Sensitive Networking to meet Hard-real Time Boundaries on Edge Intelligence Applications.

Armando Astarloa, Pedro Fernández, Jesús Lázaro, Mikel Idirin, Sergio Salas

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022

IEEE 802.1AS Clock Synchronization Performance Evaluation of an Integrated Wired-Wireless TSN Architecture.

Iñaki Val, Óscar Seijo, Raul Torrego, Armando Astarloa

IEEE Trans. Ind. Informatics, 2022

Embedded firewall for on-chip bus transactions.

Jesús Lázaro, Unai Bidarte, Leire Muguira, Armando Astarloa, Jaime Jiménez

Comput. Electr. Eng., 2022

High-Performance Computing Architecture for Sample Value Processing in the Smart Grid.

Le Sun, Leire Muguira, Jaime Jiménez, Armando Astarloa, Jesús Lázaro

IEEE Access, 2022

Impact of MACsec security on TSN traffic.

Roger Antonio Peña, Mikel Pascual, Armando Astarloa, Daniel Uribe, Jon Inchausti

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

Accelerating Video Analytic Processing on Edge Intelligence.

Pedro Fernández, Jaime Jiménez, Armando Astarloa, Mikel Idirin, Sergio Salas

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021

A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems.

Mikel Rodriguez, Jesús Lázaro, Unai Bidarte, Jaime Jiménez, Armando Astarloa

IEEE Access, 2021

2020

Secure Critical Traffic of the Electric Sector over Time-Sensitive Networking.

Leire Muguira, Jesús Lázaro, Sara Alonso, Armando Astarloa, Mikel Rodriguez

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Synchronizing NTP Referenced SCADA Systems Interconnected by High-availability Networks.

Armando Astarloa, Mikel Rodriguez, Francisco Durán, Jaime Jiménez, Jesús Lázaro

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

Electronic control board for student Rocket.

Jesús Lázaro, Laura Burgos, Leire Muguira, Armando Astarloa, Jaime Jiménez

Proceedings of the XXXV Conference on Design of Circuits and Integrated Systems, 2020

2019

Smart Sensor: SoC Architecture for the Industrial Internet of Things.

Marcelo Urbina, Tatiana Acosta, Jesús Lázaro, Armando Astarloa, Unai Bidarte

IEEE Internet Things J., 2019

2018

System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS.

Mikel Rodriguez, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2017

On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems.

Naiara Moreira, Jesús Lázaro, Unai Bidarte, Jaime Jimenez, Armando Astarloa

IEEE Trans. Smart Grid, 2017

Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs.

Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jesús Lázaro, Armando Astarloa

Microelectron. Reliab., 2017

Cyber-Physical Production System Gateway Based on a Programmable SoC Platform.

Marcelo Urbina, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Igor Villalta, Mikel Rodriguez

IEEE Access, 2017

2016

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs.

Uli Kretzschmar, Julen Gomez-Cornejo, Armando Astarloa, Unai Bidarte, Javier Del Ser

Reliab. Eng. Syst. Saf., 2016

Using OpenFlow to control redundant paths in wireless networks.

Elias Molina, Eduardo Jacob, Armando Astarloa

Netw. Protoc. Algorithms, 2016

Performance Enhancement of High-Availability Seamless Redundancy (HSR) Networks Using OpenFlow.

Elias Molina, Eduardo Jacob, Nerea Toledo, Armando Astarloa

IEEE Commun. Lett., 2016

Intelligent gateway for Industry 4.0-compliant production.

Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga, Jesús Lázaro

Proceedings of the IECON 2016, 2016

2015

PRP and HSR for High Availability Networks in Power Utility Automation: A Method for Redundant Frames Discarding.

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Jose Ignacio Garate

IEEE Trans. Smart Grid, 2015

Using Software Defined Networking to manage and control IEC 61850-based systems.

Elias Molina, Eduardo Jacob, Jon Matías, Naiara Moreira, Armando Astarloa

Comput. Electr. Eng., 2015

FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks.

Armando Astarloa, Naiara Moreira, Unai Bidarte, Marcelo Urbina, David Modrono

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Managing path diversity in layer 2 critical networks by using OpenFlow.

Elias Molina, Jon Matías, Armando Astarloa, Eduardo Jacob

Proceedings of the 11th International Conference on Network and Service Management, 2015

2014

FTL-CFree: A Fuzzy Real-Time Language for Runtime Verification.

Joaquin Perez, Jaime Jimenez, Asier Rabanal, Armando Astarloa, Jesús Lázaro

IEEE Trans. Ind. Informatics, 2014

Compact and Fast Fault Injection System for Robustness Measurements on SRAM-Based FPGAs.

Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser

IEEE Trans. Ind. Electron., 2014

Cost-effective redundancy for ethernet train communications using HSR.

Aitzol Zuloaga, Armando Astarloa, Jaime Jimenez, Jesús Lázaro, Jose Angel Araujo

Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

Securing IEEE 1588 messages with message authentication codes based on the KECCAK cryptographic algorithm implemented in FPGAs.

Naiara Moreira, Armando Astarloa, Uli Kretzschmar, Jesús Lázaro, Elias Molina

Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

Fast and accurate SEU-tolerance characterization method for Zynq SoCs.

Igor Villata, Unai Bidarte, Uli Kretzschmar, Armando Astarloa, Jesús Lázaro

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013

IEEE 1588 Transparent Clock architecture for FPGA-based network devices.

Naiara Moreira, Armando Astarloa, Jesús Lázaro, Alain García, Enekoitz Ormaetxea

Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

SHA-3 based Message Authentication Codes to secure IEEE 1588 synchronization systems.

Naiara Moreira, Armando Astarloa, Uli Kretzschmar

Proceedings of the IECON 2013, 2013

System-on-Chip implementation of Reliable Ethernet Networks nodes.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Mikel Idirin

Proceedings of the IECON 2013, 2013

Duplicate and circulating frames discard methods for PRP and HSR (IEC62439-3).

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Naiara Moreira

Proceedings of the IECON 2013, 2013

PRP and HSR version 1 (IEC 62439-3 Ed.2), improvements and a prototype implementation.

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Alain García

Proceedings of the IECON 2013, 2013

Memory requirements analysis for PRP and HSR hardware implementations on FPGAs.

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Naiara Moreira, Alain García

Proceedings of the IECON 2013, 2013

SDR control interface: An FPGA based infrastructure for control of VPX Software Defined Radio systems.

Stefanie Castillo, Armando Astarloa, Jesús Lázaro, Sergio Salas, Isaac Ballesteros

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

SEU Resilience of DES, AES and Twofish in SRAM-Based FPGA.

Uli Kretzschmar, Armando Astarloa, Jesús Lázaro

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2013

2012

Robustness of different TMR granularities in shared wishbone architectures on SRAM FPGA.

Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Mikel Garay, Javier Del Ser

Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

High availability automation networks: PRP and HSR ring implementations.

Jose Angel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Alain García

Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

Fast and accurate Single Bit Error injection into SRAM Based FPGAs.

Uli Kretzschmar, Armando Astarloa, Jaime Jimenez, Mikel Garay, Javier Del Ser

Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

On the design of an heuristically optimized multiband spectrum sensing approach for cognitive radio systems.

Javier Del Ser, Asier Alonso, Sergio Gil-Lopez, Mikel Garay, Uli Kretzschmar, Armando Astarloa

Proceedings of the 17th IEEE International Workshop on Computer Aided Modeling and Design of Communication Links and Networks, 2012

2011

I2CSec: A secure serial Chip-to-Chip communication protocol.

Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, Jaime Jimenez

J. Syst. Archit., 2011

NoCmodel: An extensible framework for Network-on-Chips modeling.

Oscar Daniel Diaz, Armando Astarloa, Aitzol Zuloaga, Jesús Lázaro, Jaime Jimenez

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Robustness Analysis of Different AES Implementations on SRAM Based FPGAs.

Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS.

Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Jaime Jimenez, Aitzol Zuloaga

Proceedings of the 2011 International Symposium on System on Chip, 2011

2010

Neuro semantic thresholding using OCR software for high precision OCR applications.

Jesús Lázaro, José Luis Martín, Jagoba Arias, Armando Astarloa, Carlos Cuadrado

Image Vis. Comput., 2010

Reconfigurable Multiprocessor Systems: A Review.

Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa

Int. J. Reconfigurable Comput., 2010

An Autonomous Fault Tolerant System for CAN Communications.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, José Luis Martín

Proceedings of the Trends in Applied Intelligent Systems, 2010

2009

Overview of FPGA-Based Multiprocessor Systems.

Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009

A novel SEU, MBU and SHE handling strategy for Xilinx Virtex-4 FPGAs.

Xabier Iturbe, Mikel Azkarate-askasua, Imanol Martinez, Jon Pérez, Armando Astarloa

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.

Jesús Lázaro, Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga

Proceedings of the Reconfigurable Computing: Architectures, 2009

2008

Configurable-System-on-Programmable-Chip for Power Electronics Control Applications.

Armando Astarloa, Unai Bidarte, Jesús Lázaro, Jon Andreu, José Luis Martín

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes.

Armando Astarloa, Unai Bidarte, Jaime Jimenez, Jesús Lázaro, Iñigo Martínez de Alegría

Proceedings of the Autonomic and Trusted Computing, 5th International Conference, 2008

2007

Design of a Master Device for the Multifunction Vehicle Bus.

Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa, Aitzol Zuloaga

IEEE Trans. Veh. Technol., 2007

Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.

Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez

J. Syst. Archit., 2007

Hardware architecture for a general regression neural network coprocessor.

Jesús Lázaro, Jagoba Arias, Armando Astarloa, Unai Bidarte, Aitzol Zuloaga

Neurocomputing, 2007

GPS-less location algorithm for wireless sensor networks.

Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa

Comput. Commun., 2007

2006

Modifying Slots in Test Vectors to Validate Decoders of a Train Network.

Jaime Jimenez, Iker Hoyos, Jagoba Arias, Armando Astarloa, José Luis Martín

Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006

Adaptation of IEEE 802.1X for Secure Session Establishment Between Ethernet Peers.

Purificación Sáiz, Jon Matías, Eduardo Jacob, Javier Bustamante, Armando Astarloa

Proceedings of the Information Systems Security, Second International Conference, 2006

2005

Implementation of a modified Fuzzy C-Means clustering algorithm for real-time applications.

Jesús Lázaro, Jagoba Arias, José Luis Martín, Carlos Cuadrado, Armando Astarloa

Microprocess. Microsystems, 2005

Multiprocessor SoPC-Core for FAT volume computation.

Armando Astarloa, Unai Bidarte, Jesús Lázaro, Aitzol Zuloaga, Jagoba Arias

Microprocess. Microsystems, 2005

2004

Malguki: an RSSI based ad hoc location algorithm.

Jagoba Arias, Aitzol Zuloaga, Jesús Lázaro, Jon Andreu, Armando Astarloa

Microprocess. Microsystems, 2004

Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development.

Armando Astarloa, Jesús Lázaro, Jagoba Arias, Unai Bidarte, Aitzol Zuloaga

Proceedings of the International Conference on Modeling, 2004

High Throughput Serpent Encryption Implementation.

Jesús Lázaro, Armando Astarloa, Jagoba Arias, Unai Bidarte, Carlos Cuadrado

Proceedings of the Field Programmable Logic and Application, 2004

Simulation Platform for Architectural Verification and Performance Analysis in Core-Based SoC Design.

Unai Bidarte, Armando Astarloa, José Luis Martín, Jon Andreu

Proceedings of the Field Programmable Logic and Application, 2004

A Self-Reconfiguration Framework for Multiprocessor CSoPCs.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, José Luis Martín, Aitzol Zuloaga

Proceedings of the Field Programmable Logic and Application, 2004

2003

Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.

Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003