Unai Bidarte

According to our database, Unai Bidarte authored at least 40 papers between 2003 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Timing requirements on multi-processing and reconfigurable embedded systems with multiple environments.

Sara Alonso, Jesús Lázaro, Jaime Jiménez, Leire Muguira, Unai Bidarte

Proceedings of the 38th Conference on Design of Circuits and Integrated Systems, 2023

2022

Embedded firewall for on-chip bus transactions.

Jesús Lázaro, Unai Bidarte, Leire Muguira, Armando Astarloa, Jaime Jiménez

Comput. Electr. Eng., 2022

The influence of virtualization on real-time systems' interrupts in embedded SoC platforms.

Sara Alonso, Jesús Lázaro, Jaime Jiménez, Leire Muguira, Unai Bidarte

Proceedings of the 37th Conference on Design of Circuits and Integrated Systems, 2022

2021

Fast and efficient address search in System-on-a-Programmable-Chip using binary trees.

Jesús Lázaro, Unai Bidarte, Leire Muguira, Carlos Cuadrado, Jaime Jiménez

Comput. Electr. Eng., 2021

A Fixed-Latency Architecture to Secure GOOSE and Sampled Value Messages in Substation Systems.

Mikel Rodriguez, Jesús Lázaro, Unai Bidarte, Jaime Jiménez, Armando Astarloa

IEEE Access, 2021

Evaluating the OpenAMP framework in real-time embedded SoC platforms.

Sara Alonso, Jesús Lázaro, Jaime Jimenez, Leire Muguira, Unai Bidarte

Proceedings of the XXXVI Conference on Design of Circuits and Integrated Systems, 2021

2019

Smart Sensor: SoC Architecture for the Industrial Internet of Things.

Marcelo Urbina, Tatiana Acosta, Jesús Lázaro, Armando Astarloa, Unai Bidarte

IEEE Internet Things J., 2019

Fast and efficient FPGA prototype system for embedded control algorithms in electric traction.

Carlos Cuadrado, Iñigo Kortabarria, Jesús Lázaro, Unai Bidarte, Jaime Jiménez

Proceedings of the XXXIV Conference on Design of Circuits and Integrated Systems, 2019

2018

SEU emulation in industrial SoCs combining microprocessor and FPGA.

Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jaime Jimenez, Jesús Lázaro

Reliab. Eng. Syst. Saf., 2018

System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS.

Mikel Rodriguez, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2017

On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems.

Naiara Moreira, Jesús Lázaro, Unai Bidarte, Jaime Jimenez, Armando Astarloa

IEEE Trans. Smart Grid, 2017

Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs.

Igor Villalta, Unai Bidarte, Julen Gomez-Cornejo, Jesús Lázaro, Armando Astarloa

Microelectron. Reliab., 2017

Cyber-Physical Production System Gateway Based on a Programmable SoC Platform.

Marcelo Urbina, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Igor Villalta, Mikel Rodriguez

IEEE Access, 2017

2016

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs.

Uli Kretzschmar, Julen Gomez-Cornejo, Armando Astarloa, Unai Bidarte, Javier Del Ser

Reliab. Eng. Syst. Saf., 2016

Intelligent gateway for Industry 4.0-compliant production.

Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga, Jesús Lázaro

Proceedings of the IECON 2016, 2016

2015

FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks.

Armando Astarloa, Naiara Moreira, Unai Bidarte, Marcelo Urbina, David Modrono

Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

2014

Fast and accurate SEU-tolerance characterization method for Zynq SoCs.

Igor Villata, Unai Bidarte, Uli Kretzschmar, Armando Astarloa, Jesús Lázaro

Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013

Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor.

Julen Gomez-Cornejo, Aitzol Zuloaga, Uli Kretzschmar, Unai Bidarte, Jaime Jimenez

Proceedings of the IECON 2013, 2013

System-on-Chip implementation of Reliable Ethernet Networks nodes.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Mikel Idirin

Proceedings of the IECON 2013, 2013

2011

I2CSec: A secure serial Chip-to-Chip communication protocol.

Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, Jaime Jimenez

J. Syst. Archit., 2011

Robustness Analysis of Different AES Implementations on SRAM Based FPGAs.

Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Unai Bidarte, Jaime Jimenez

Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011

2010

Reconfigurable Multiprocessor Systems: A Review.

Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa

Int. J. Reconfigurable Comput., 2010

An Autonomous Fault Tolerant System for CAN Communications.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, José Luis Martín

Proceedings of the Trends in Applied Intelligent Systems, 2010

2009

Overview of FPGA-Based Multiprocessor Systems.

Taho Dorta, Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009

AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.

Jesús Lázaro, Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga

Proceedings of the Reconfigurable Computing: Architectures, 2009

2008

Configurable-System-on-Programmable-Chip for Power Electronics Control Applications.

Armando Astarloa, Unai Bidarte, Jesús Lázaro, Jon Andreu, José Luis Martín

Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes.

Armando Astarloa, Unai Bidarte, Jaime Jimenez, Jesús Lázaro, Iñigo Martínez de Alegría

Proceedings of the Autonomic and Trusted Computing, 5th International Conference, 2008

2007

Design of a Master Device for the Multifunction Vehicle Bus.

Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa, Aitzol Zuloaga

IEEE Trans. Veh. Technol., 2007

Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.

Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez

J. Syst. Archit., 2007

Hardware architecture for a general regression neural network coprocessor.

Jesús Lázaro, Jagoba Arias, Armando Astarloa, Unai Bidarte, Aitzol Zuloaga

Neurocomputing, 2007

2006

Comparison of two designs for the multifunction vehicle bus.

Jaime Jimenez, José Luis Martín, Aitzol Zuloaga, Unai Bidarte, Jagoba Arias

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

Multiprocessor SoPC-Core for FAT volume computation.

Armando Astarloa, Unai Bidarte, Jesús Lázaro, Aitzol Zuloaga, Jagoba Arias

Microprocess. Microsystems, 2005

Hardware implementation of optical flow constraint equation using FPGAs.

José L. Martín-Sánchez, Aitzol Zuloaga, Carlos Cuadrado, Jesús Lázaro, Unai Bidarte

Comput. Vis. Image Underst., 2005

2004

Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development.

Armando Astarloa, Jesús Lázaro, Jagoba Arias, Unai Bidarte, Aitzol Zuloaga

Proceedings of the International Conference on Modeling, 2004

High Throughput Serpent Encryption Implementation.

Jesús Lázaro, Armando Astarloa, Jagoba Arias, Unai Bidarte, Carlos Cuadrado

Proceedings of the Field Programmable Logic and Application, 2004

Simulation Platform for Architectural Verification and Performance Analysis in Core-Based SoC Design.

Unai Bidarte, Armando Astarloa, José Luis Martín, Jon Andreu

Proceedings of the Field Programmable Logic and Application, 2004

A Self-Reconfiguration Framework for Multiprocessor CSoPCs.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, José Luis Martín, Aitzol Zuloaga

Proceedings of the Field Programmable Logic and Application, 2004

2003

Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.

Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003