Aitzol Zuloaga

Orcid: 0000-0002-8199-3117

According to our database1, Aitzol Zuloaga authored at least 36 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems.
IEEE Trans. Reliab., March, 2024

2022
Data content scrubbing approach for SRAM based FPGA designs.
Proceedings of the 31st IEEE International Symposium on Industrial Electronics, 2022

2017
A novel BRAM content accessing and processing method based on FPGA configuration bitstream.
Microprocess. Microsystems, 2017

2016
Intelligent gateway for Industry 4.0-compliant production.
Proceedings of the IECON 2016, 2016

2015
PRP and HSR for High Availability Networks in Power Utility Automation: A Method for Redundant Frames Discarding.
IEEE Trans. Smart Grid, 2015

2014
Cost-effective redundancy for ethernet train communications using HSR.
Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

2013
Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor.
Proceedings of the IECON 2013, 2013

System-on-Chip implementation of Reliable Ethernet Networks nodes.
Proceedings of the IECON 2013, 2013

Duplicate and circulating frames discard methods for PRP and HSR (IEC62439-3).
Proceedings of the IECON 2013, 2013

PRP and HSR version 1 (IEC 62439-3 Ed.2), improvements and a prototype implementation.
Proceedings of the IECON 2013, 2013

2012
High availability automation networks: PRP and HSR ring implementations.
Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

2011
I2CSec: A secure serial Chip-to-Chip communication protocol.
J. Syst. Archit., 2011

NoCmodel: An extensible framework for Network-on-Chips modeling.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS.
Proceedings of the 2011 International Symposium on System on Chip, 2011

2010
An Autonomous Fault Tolerant System for CAN Communications.
Proceedings of the Trends in Applied Intelligent Systems, 2010

2009
PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.
Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009

AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.
Proceedings of the Reconfigurable Computing: Architectures, 2009

2008
LL-MAC: A low latency MAC protocol for wireless self-organised networks.
Microprocess. Microsystems, 2008

A Novel Technique for Low Latency Data Gathering in Wireless Sensor Networks.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007
Design of a Master Device for the Multifunction Vehicle Bus.
IEEE Trans. Veh. Technol., 2007

Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.
J. Syst. Archit., 2007

Hardware architecture for a general regression neural network coprocessor.
Neurocomputing, 2007

GPS-less location algorithm for wireless sensor networks.
Comput. Commun., 2007

2006
Comparison of two designs for the multifunction vehicle bus.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

SOM Segmentation of gray scale images for optical recognition.
Pattern Recognit. Lett., 2006

Node Synchronization in Wireless Sensor Networks.
Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006

2005
Multiprocessor SoPC-Core for FAT volume computation.
Microprocess. Microsystems, 2005

Hardware implementation of optical flow constraint equation using FPGAs.
Comput. Vis. Image Underst., 2005

2004
Malguki: an RSSI based ad hoc location algorithm.
Microprocess. Microsystems, 2004

Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development.
Proceedings of the International Conference on Modeling, 2004

Doppler Location Algorithm for Wireless Sensor Networks.
Proceedings of the International Conference on Wireless Networks, 2004

A Self-Reconfiguration Framework for Multiprocessor CSoPCs.
Proceedings of the Field Programmable Logic and Application, 2004

2003
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2001
Software Workbench for Movement Estimation based on Optical Flow Computation.
Proceedings of the IASTED International Conference on Visualization, 2001

1998
Hardware Architecture for Optical Flow Estimation in Real Time.
Proceedings of the 1998 IEEE International Conference on Image Processing, 1998


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