Janghoon Song

According to our database, Janghoon Song authored at least 4 papers between 2006 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A 7 ps Jitter 0.053 mm² Fast Lock All-Digital DLL With a Wide Range and High Resolution DCC.

Dongsuk Shin, Janghoon Song, Hyunsoo Chae, Chulwoo Kim

IEEE J. Solid State Circuits, 2009

2008

A 0.004-mm² Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor.

Inhwa Jung, Gunok Jung, Janghoon Song, Moo-young Kim, Junyoung Park, Sung-Bae Park, Chulwoo Kim

IEEE Trans. Circuits Syst. II Express Briefs, 2008

2007

A 7ps-Jitter 0.053mm2 Fast-Lock ADDLL with Wide-Range and High-Resolution All-Digital DCC.

Dongsuk Shin, Janghoon Song, Hyunsoo Chae, Kwan-Weon Kim, Young-Jung Choi, Chulwoo Kim

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

An Efficient Adaptive Digital DC-DC Converter with Dual Loop Controls for Fast Dynamic Voltage Scaling.

Janghoon Song, Gilwon Yoon, Chulwoo Kim

Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006