Gunok Jung

According to our database1, Gunok Jung authored at least 12 papers between 2000 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2013
Scan-controlled pulse flip-flops for mobile application processors.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2011
A static-switching pulse domino technique for statistical power reduction of wide fan-in dynamic gates.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2010
Fully digital clock frequency doubler.
IEICE Electron. Express, 2010

2009
A Way Enabling Mechanism Based on the Branch Prediction Information for Low Power Instruction Cache.
IEICE Trans. Electron., 2009

Low-Power Embedded Processor Design Using Branch Direction.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

2008
A 0.004-mm<sup>2</sup> Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Power and Skew Aware Point Diffusion Clock Network.
IEICE Trans. Electron., 2008

Skew variation compensating technique for clock mesh networks.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2002
A robust self-resetting CMOS 32-bit parallel adder.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

High-speed add-compare-select units using locally self-resetting CMOS.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
High-speed CORDIC implementations using advanced circuit techniques.
Proceedings of the IEEE International Conference on Acoustics, 2001

2000
Time borrowing in high-speed functional units using skew-tolerant domino circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000


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