Jaume Joven

According to our database1, Jaume Joven authored at least 12 papers between 2006 and 2015.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2015
A fast pruning technique for low-power inexact Circuit design.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

2013
QoS-Driven Reconfigurable Parallel Computing for NoC-Based Clustered MPSoCs.
IEEE Trans. Ind. Informatics, 2013

An integrated, programming model-driven framework for NoC-QoS support in cluster-based embedded many-cores.
Parallel Comput., 2013

2012
Development process for clusters on a reconfigurable chip.
Comput. Electr. Eng., 2012

2011
HW-SW implementation of a decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs.
Proceedings of the Industrial Embedded Systems (SIES), 2011

Sharing FPUs in many-soft-cores.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

2010
MPSoC Performance Analysis with Virtual Prototyping Platforms.
Proceedings of the 39th International Conference on Parallel Processing, 2010

Scalability of a Parallel JPEG Encoder on Shared Memory Architectures.
Proceedings of the 39th International Conference on Parallel Processing, 2010

A NoC-based multi-{soft}core with 16 cores.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Exploring programming model-driven QoS support for NoC-based platforms.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2008
xENoC - An eXperimental Network-On-Chip Environment for Parallel Distributed Computing on NoC-based MPSoC Architectures.
Proceedings of the 16th Euromicro International Conference on Parallel, 2008

2006
A Validation And Performance Evaluation Tool for ProtoNoC.
Proceedings of the International Symposium on System-on-Chip, 2006


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