Jean Carlo Hamerski

According to our database1, Jean Carlo Hamerski authored at least 5 papers between 2007 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Broker Fault Recovery for a Multiprocessor System-an-Chip Middleware.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Evaluating Serialization for a Publish-Subscribe Based Middleware for MPSoCs.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017
Publish-subscribe programming for a NoC-based multiprocessor system-on-chip.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

2007
Evaluating memory sharing data size and TCP connections in the performance of a reconfigurable hardware-based architecture for TCP/IP stack.
Proceedings of the IFIP VLSI-SoC 2007, 2007


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