Fernando Gehm Moraes

IEEE Des. Test, October, 2023

A Comprehensive Evaluation of Convolutional Hardware Accelerators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

From CNN to DNN Hardware Accelerators: A Survey on Design, Exploration, Simulation, and Frameworks.

[BibT_eX]

[DOI]

Rafael Garibotti

Found. Trends Electron. Des. Autom., 2023

A Comprehensive Framework for Systemic Security Management in NoC-Based Many-Cores.

[BibT_eX]

[DOI]

IEEE Access, 2023

FLEA - FIT-Aware Heuristic for Application Allocation in Many-Cores based on Q-Learning.

[BibT_eX]

[DOI]

Vitor Balbinot Zanini

Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023

Deploying Machine Learning in Resource-Constrained Devices for Human Activity Recognition.

[BibT_eX]

[DOI]

Rafael Schild Reusch

Marcos Luiggi Lemos Sartori

Proceedings of the XIII Brazilian Symposium on Computing Systems Engineering, 2023

Validating an Automated Asynchronous Synthesis Environment with a Challenging Design: RISC-V.

[BibT_eX]

[DOI]

Willian Analdo Nunes

Carlos Gabriel de Araujo Gewehr

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Assessment of Lightweight Cryptography Algorithms on ARM Cortex-M Processors.

[BibT_eX]

[DOI]

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Improving the Efficiency of Cryptography Algorithms on Resource-Constrained Embedded Systems via RISC-V Instruction Set Extensions.

[BibT_eX]

[DOI]

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Secure Network Interface for Protecting IO Communication in Many-cores.

[BibT_eX]

[DOI]

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Assessment of Communication Protocols' Latency in Co-processing Robotic Systems.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Lightweight Authentication for Secure IO Communication in NoC-based Many-cores.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022

A Fast, Accurate, and Comprehensive PPA Estimation of Convolutional Hardware Accelerators.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Guest Editors' Introduction: SBCCI 2020.

[BibT_eX]

[DOI]

Frank Sill Torres

IEEE Des. Test, 2022

Assessment and Optimization of 1D CNN Model for Human Activity Recognition.

[BibT_eX]

[DOI]

Rafael Schild Reusch

Proceedings of the XII Brazilian Symposium on Computing Systems Engineering, 2022

Non-intrusive Monitoring Framework for NoC-based Many-Cores.

[BibT_eX]

[DOI]

Caroline da Silva Borges

Proceedings of the XII Brazilian Symposium on Computing Systems Engineering, 2022

A High-level Model to Leverage NoC-based Many-core Research.

[BibT_eX]

[DOI]

Iacana Ianiski Weber

Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Secure Communication with Peripherals in NoC-based Many-cores.

[BibT_eX]

[DOI]

Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Design-Time Analysis of Real-Time Traffic for Networks-on-Chip using Constraint Models.

[BibT_eX]

[DOI]

Sergio Johann Filho

Proceedings of the 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2022

Reliability Assessment of Many-Core Dynamic Thermal Management.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Design-Time Scheduling of Periodic, Hard Real-Time Flows for NoC-based Systems.

[BibT_eX]

[DOI]

Sergio Johann Filho

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

Leveraging NoC-based Many-core Performance Through Runtime Mapping Defragmentation.

[BibT_eX]

[DOI]

Caroline da Silva Borges

Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021

A High-Level Modeling Framework for Estimating Hardware Metrics of CNN Accelerators.

[BibT_eX]

[DOI]

Alexandre F. Hampel

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Evaluation of the soft error assessment consistency of a JIT-based virtual platform simulator.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2021

Hardware Accelerator for Runtime Temperature Estimation in Many-Cores.

[BibT_eX]

[DOI]

Alzemiro Lucas da Silva

Iacana Ianiski Weber

Anderson Camargo Sant'Ana

IEEE Des. Test, 2021

Security Vulnerabilities and Countermeasures in MPSoCs.

[BibT_eX]

[DOI]

IEEE Des. Test, 2021

Detection and Countermeasures of Security Attacks and Faults on NoC-Based Many-Cores.

[BibT_eX]

[DOI]

IEEE Access, 2021

ORCA RT-Bench: A Reference Architecture for Real-Time Scheduling Simulators.

[BibT_eX]

[DOI]

João Benno

Proceedings of the XI Brazilian Symposium on Computing Systems Engineering, 2021

Chronos: An Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

A TensorFlow and System Simulator Integration Approach to Estimate Hardware Metrics of Convolution Accelerators.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

Dynamic Thermal Management in Many-Core Systems Leveraged by Abstract Modeling.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

Dynamic Mapping for Many-cores using Management Application Organization.

[BibT_eX]

[DOI]

Leonardo Vian Erthal

Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020

Modular and Distributed Management of Many-Core SoCs.

[BibT_eX]

[DOI]

Anderson Camargo Sant'Ana

Axel Jantsch

ACM Trans. Comput. Syst., 2020

A Survey of Aging Monitors and Reconfiguration Techniques.

[BibT_eX]

[DOI]

CoRR, 2020

SDN-Based Secure Application Admission and Execution for Many-Cores.

[BibT_eX]

[DOI]

IEEE Access, 2020

A Systemic and Secure SDN Framework for NoC-Based Many-Cores.

[BibT_eX]

[DOI]

IEEE Access, 2020

Reducing NoC Energy Consumption Exploring Asynchronous End-to-end GALS Communication.

[BibT_eX]

[DOI]

Leonardo Londero de Oliveira

Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Mapping and Migration Strategies for Thermal Management in Many-Core Systems.

[BibT_eX]

[DOI]

Alzemiro Lucas da Silva

Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Multiple-objective Management based on a Distributed SDN Architecture for Many-cores.

[BibT_eX]

[DOI]

Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Open-Source NoC-Based Many-Core for Evaluating Hardware Trojan Detection Methods.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Lightweight Cryptographic Instruction Set Extension on Xtensa Processor.

[BibT_eX]

[DOI]

Gabriel H. Eisenkraemer

Leonardo L. de Oliveira

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Self-Adaptive QoS Management of Computation and Communication Resources in Many-Core SoCs.

[BibT_eX]

[DOI]

Axel Jantsch

ACM Trans. Embed. Comput. Syst., 2019

Hierarchical adaptive Multi-objective resource management for many-core systems.

[BibT_eX]

[DOI]

Amir M. Rahmani

Nikil D. Dutt

J. Syst. Archit., 2019

The power impact of hardware and software actuators on self-adaptable many-core systems.

[BibT_eX]

[DOI]

Rafael Garibotti

Nikil D. Dutt

J. Syst. Archit., 2019

Memphis: a framework for heterogeneous many-core SoCs generation and validation.

[BibT_eX]

[DOI]

Des. Autom. Embed. Syst., 2019

Fine-grain temperature monitoring for many-core systems.

[BibT_eX]

[DOI]

Anderson Camargo Sant'Ana

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

Lightweight security mechanisms for MPSoCs.

[BibT_eX]

[DOI]

Kevin Boucinha Fiorentin

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

An IR-UWB pulse generator using PAM modulation with adaptive PSD in 130nm CMOS process.

[BibT_eX]

[DOI]

Luiz Carlos Moreira

José Fontebasso Neto

Walter Silva Oliveira

Thiago Ferauche

Guilherme Heck

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

A FPGA parameterizable multi-layer architecture for CNNs.

[BibT_eX]

[DOI]

Guilherme Korol

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

Distributed SDN architecture for NoC-based many-core SoCs.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

A Framework for Heterogeneous Many-core SoCs Generation.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Security in Many-Core SoCs Leveraged by Opaque Secure Zones.

[BibT_eX]

[DOI]

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

2018

A Hierarchical and Distributed Fault Tolerant Proposal for NoC-Based MPSoCs.

[BibT_eX]

[DOI]

Vinicius Fochi

Francisco F. S. Barreto

IEEE Trans. Emerg. Top. Comput., 2018

Exploring Asynchronous End-to-End Communication Through a Synchronous NoC.

[BibT_eX]

[DOI]

Leonardo L. de Oliveira

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Secure Environment Architecture for MPSoCs.

[BibT_eX]

[DOI]

Bruno Scherer Oliveira

Anderson C. Sant'Ana

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Fault-Tolerance at the Management Level in Many-Core Systems.

[BibT_eX]

[DOI]

Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

Evaluating the cost to cipher the NoC communication.

[BibT_eX]

[DOI]

Bruno S. Oliveira

Rafael Schild Reusch

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Runtime creation of continuous secure zones in many-core systems for secure applications.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Software-Defined Networking Architecture for NoC-based Many-Cores.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

An LSSD Compliant Scan Cell for Flip-Flops.

[BibT_eX]

[DOI]

Leonardo Londero de Oliveira

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Exploring RSA Performance up to 4096-bit for Fast Security Processing on a Flexible Instruction Set Architecture Processor.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Evaluating Serialization for a Publish-Subscribe Based Middleware for MPSoCs.

[BibT_eX]

[DOI]

Jean Carlo Hamerski

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Secure Admission of Applications in Many-cores.

[BibT_eX]

[DOI]

Vinicius Fochi

Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

2017

BrNoC: A broadcast NoC for control messages in many-core systems.

[BibT_eX]

[DOI]

Microelectron. J., 2017

Distributed Runtime Energy Management for Many-Core Systems Running Real-Time Applications.

[BibT_eX]

[DOI]

J. Low Power Electron., 2017

Exploiting performance, dynamic power and energy scaling in full-system simulators.

[BibT_eX]

[DOI]

Liana Dessandre Duenha

Rodolfo Azevedo

Concurr. Comput. Pract. Exp., 2017

System management recovery protocol for MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Secure admission and execution of applications in many-core systems.

[BibT_eX]

[DOI]

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Estimation methods for static noise margins in CMOS subthreshold logic circuits.

[BibT_eX]

[DOI]

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Hardware and software infrastructure to implement many-core systems in modern FPGAs.

[BibT_eX]

[DOI]

Felipe T. Bortolon

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

SDN-Based Circuit-Switching for Many-Cores.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Demystifying the cost of task migration in distributed memory many-core systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Runtime energy management under real-time constraints in MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

Activation of secure zones in many-core systems with dynamic rerouting.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

XGT4: An industrial grade, open source tester for multi-gigabit networks.

[BibT_eX]

[DOI]

Felipe B. Lazzarotto

Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017

2016

Hierarchical energy monitoring for task mapping in many-core systems.

[BibT_eX]

[DOI]

J. Syst. Archit., 2016

MPSoCBench: A benchmark for high-level evaluation of multiprocessor system-on-chip tools and methodologies.

[BibT_eX]

[DOI]

Liana Dessandre Duenha

Thiago Santiago

Rodolfo Azevedo

J. Parallel Distributed Comput., 2016

A lightweight software-based runtime temperature monitoring model for multiprocessor embedded systems.

[BibT_eX]

[DOI]

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

A layered approach for fault tolerant NoC-based MPSoCs - Special session: Dependable MPSoCs.

[BibT_eX]

[DOI]

Francisco F. S. Barreto

Vinicius Fochi

Proceedings of the 17th Latin-American Test Symposium, 2016

DMNI: A specialized network interface for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Efficient traffic balancing for NoC routing latency minimization.

[BibT_eX]

[DOI]

Joao Marcelo Ferreira

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A data extraction and debugging framework for large-scale MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Runtime energy management for many-core systems.

[BibT_eX]

[DOI]

Andre L. M. Martins

Anderson C. Sant'Ana

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Mapping of real-time applications on a packet switching NoC-based MPSoC.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Scalability evaluation in many-core systems due to the memory organization.

[BibT_eX]

[DOI]

Liana Dessandre Duenha

Rodolfo Azevedo

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Dynamic Real-Time Scheduler for Large-Scale MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2015

Runtime Adaptive Circuit Switching and Flow Priority in NoC-Based MPSoCs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Static Differential NCL Gates: Toward Low Power.

[BibT_eX]

[DOI]

Michel Evandro Arendt

IEEE Trans. Circuits Syst. II Express Briefs, 2015

A Distributed Energy-aware Task Mapping to Achieve Thermal Balancing and Improve Reliability of Many-core Systems.

[BibT_eX]

[DOI]

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

SDDS-NCL Design: Analysis of Supply Voltage Scaling.

[BibT_eX]

[DOI]

Ricardo A. Guazzelli

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

A digitally controlled oscillator for fine-grained local clock generators in MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

BAT-Hermes: A transition-signaling bundled-data NoC router.

[BibT_eX]

[DOI]

Matheus Gibiluka

Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015

Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability.

[BibT_eX]

[DOI]

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

A context saving fault tolerant approach for a shared memory many-core architecture.

[BibT_eX]

[DOI]

Nicolas Ventroux

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

An integrated method for implementing online fault detection in NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Fault recovery protocol for distributed memory MPSoCs.

[BibT_eX]

[DOI]

Francisco F. S. Barreto

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Differentiation of MPSoCs message classes using multiple NoCs.

[BibT_eX]

[DOI]

Douglas R. G. Silva

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A hierarchical LST-based task scheduler for NoC-based MPSoCs with slack-time monitoring support.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

Hierarchical energy monitoring for many-core systems.

[BibT_eX]

[DOI]

Andre L. M. Martins

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A platform-based design framework to boost many-core software development.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

A non-intrusive and reconfigurable access control to secure NoCs.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Conference on Electronics, 2015

2014

Beware the Dynamic C-Element.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

Differentiated Communication Services for NoC-Based MPSoCs.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

MoNoC: A monitored network on chip with path adaptation mechanism.

[BibT_eX]

[DOI]

J. Syst. Archit., 2014

Spatially Distributed Dual-Spacer Null Convention Logic Design.

[BibT_eX]

[DOI]

Guilherme Trojan

J. Low Power Electron., 2014

A Fast Runtime Fault Recovery Approach for NoC-Based MPSoCS for Performance Constrained Applications.

[BibT_eX]

[DOI]

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Runtime QoS Support for MPSoC: a Processor Centric Approach.

[BibT_eX]

[DOI]

Proceedings of the 27th Symposium on Integrated Circuits and Systems Design, 2014

Fast energy evaluation of embedded applications for many-core systems.

[BibT_eX]

[DOI]

Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014

Runtime fault recovery protocol for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

A framework for MPSoC generation and distributed applications evaluation.

[BibT_eX]

[DOI]

Augusto Erichsen

Thiago Monteiro

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Tool-set for NoC-based MPSoC debugging - A protocol view perspective.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

A monitored NoC with runtime path adaptation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Effects of the NoC architecture in the performance of NoC-based MPSoCs.

[BibT_eX]

[DOI]

Douglas R. G. Silva

Bruno S. Oliveira

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

A method for NoC-based MPSoC energy consumption estimation.

[BibT_eX]

[DOI]

Andre L. M. Martins

Douglas R. G. Silva

Thiago Monteiro

Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014

2013

Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., 2013

Fault recovery communication protocol for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Eduardo Weber Wächter

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

Distributed resource management in NoC-based MPSoCs with dynamic cluster sizes.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

Determining the test sources/sinks for NoC TAMs.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

Adaptive QoS techniques for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Symposium on System on Chip, 2013

Achieving QoS in NoC-based MPSoCs through Dynamic Frequency Scaling.

[BibT_eX]

[DOI]

Proceedings of the 2013 International Symposium on System on Chip, 2013

Evaluating the scalability of test buses.

[BibT_eX]

[DOI]

Marcelo Soares Lubaszewski

Cristiano Lazzari

Proceedings of the 2013 International Symposium on System on Chip, 2013

Multi-level MPSoC modeling for reducing software development cycle.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE International Conference on Electronics, 2013

Charge sharing aware NCL gates design.

[BibT_eX]

[DOI]

Bruno S. Oliveira

Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

Topology-agnostic fault-tolerant NoC routing method.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Enabling Adaptive Techniques in Heterogeneous MPSoCs Based on Virtualization.

[BibT_eX]

[DOI]

Sameer Varyani

ACM Trans. Reconfigurable Technol. Syst., 2012

MAZENOC: Novel approach for fault-tolerant NOC routing.

[BibT_eX]

[DOI]

Eduardo Weber Wächter

Proceedings of the IEEE 25th International SOC Conference, 2012

Power consumption reduction in MPSoCs through DFS.

[BibT_eX]

[DOI]

Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012

A spectrum of MPSoC models for design space exploration and its use.

[BibT_eX]

[DOI]

Carlos A. Petry

Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012

Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2012 International Symposium on System on Chip, 2012

Impact of C-elements in asynchronous circuits.

[BibT_eX]

[DOI]

Bruno Cruz de Oliveira

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

Proposal and evaluation of a task migration protocol for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A generic FPGA emulation framework.

[BibT_eX]

[DOI]

Douglas de O. Cardoso

M. Magnaguagno

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Evaluation of adaptive management techniques in NoC-Based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

Enhancing performance of MPSoCs through distributed resource management.

[BibT_eX]

[DOI]

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011

CAFES: A framework for intrachip application modeling and communication architecture design.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2011

A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms.

[BibT_eX]

[DOI]

J. Parallel Distributed Comput., 2011

A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines.

[BibT_eX]

[DOI]

Rafael Iankowski Soares

Philippe Maurine

Lionel Torres

IEEE Des. Test Comput., 2011

Exploring NoC-Based MPSoC Design Space with Power Estimation Models.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2011

A self-adaptable distributed DFS scheme for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Thiago R. da Rosa

Douglas de O. Cardoso

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework.

[BibT_eX]

[DOI]

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

Multi-task dynamic mapping onto NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

Energy-efficient cache coherence protocol for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Tales Marchesan Chaves

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

Early estimation of wire length for dedicated test access mechanisms in networks-on-chip based SoCs.

[BibT_eX]

[DOI]

Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011

Arbitration and routing impact on NoC design.

[BibT_eX]

[DOI]

Edson I. Moreno

Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

HeMPS-S: A homogeneous NoC-based MPSoCs framework prototyped in FPGAs.

[BibT_eX]

[DOI]

Adelcio Biazi

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Exploring heterogeneous NoC-based MPSoCs: From FPGA to high-level modeling.

[BibT_eX]

[DOI]

Michel Robert

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Exploiting multicast messages in cache-coherence protocols for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Tales Marchesan Chaves

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Energy-aware dynamic task mapping for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Thiago Gouvea

Guilherme Medeiros

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Predictive Dynamic Frequency Scaling for Multi-Processor Systems-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Adapting a C-element design flow for low power.

[BibT_eX]

[DOI]

Bruno Cruz de Oliveira

Julian J. H. Pontes

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Dynamic Flow Reconfiguration Strategy to Avoid Communication Hot-Spots.

[BibT_eX]

[DOI]

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Achieving composability in NoC-based MPSoCs through QoS management at software level.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

Evaluating energy consumption of homogeneous MPSoCs using spare tiles.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011

2010

Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms.

[BibT_eX]

[DOI]

Ewerson Luiz de Souza Carvalho

Int. J. Embed. Real Time Commun. Syst., 2010

Dynamic Task Mapping for MPSoCs.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2010

Hermes-AA: A 65nm asynchronous NoC router with adaptive routing.

[BibT_eX]

[DOI]

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Flow oriented routing for NOCS.

[BibT_eX]

[DOI]

Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

Implementation and evaluation of a congestion aware routing algorithm for networks-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

Evaluating the impact of task migration in multi-processor systems-on-chip.

[BibT_eX]

[DOI]

Proceedings of the 23rd Annual Symposium on Integrated Circuits and Systems Design, 2010

Instruction Set Simulator for MPSoCs based on NoCs and MIPS Processors.

[BibT_eX]

André Rodrigues

Proceedings of the 5th International Workshop on Reconfigurable Communication-centric Systems on Chip, 2010

Hermes-A - An Asynchronous NoC Router with Distributed Routing.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010

A message-level monitoring protocol for QoS flows in NoCs.

[BibT_eX]

[DOI]

Thiago R. da Rosa

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010

Model-based design flow for NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Improving QoS of Multi-layer Networks-on-Chip with Partial and Dynamic Reconfiguration of Routers.

[BibT_eX]

[DOI]

Peter Fischer

Proceedings of the International Conference on Field Programmable Logic and Applications, 2010

2009

Crosstalk Fault Tolerant NoC: Design and Evaluation.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: Technologies for Systems Integration, 2009

A path-load based adaptive routing algorithm for networks-on-chip.

[BibT_eX]

[DOI]

Fabien Clermidy

Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

A high abstraction, high accuracy power estimation model for networks-on-chip.

[BibT_eX]

[DOI]

Cezar Reinbrecht

Thiago Raupp da Rosa

Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Floating Point Hardware for Embedded Processors in FPGAs: Design Space Exploration for Performance and Area.

[BibT_eX]

[DOI]

Taciano A. Rodolfo

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

A 10 Gbps OTN Framer Implementation Targeting FPGA Devices.

[BibT_eX]

[DOI]

Frederico Ferlini

Jeferson Oliveira

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Increasing NoC power estimation accuracy through a rate-based model.

[BibT_eX]

[DOI]

Cezar Reinbrecht

Thiago R. da Rosa

Proceedings of the Third International Symposium on Networks-on-Chips, 2009

Characterising embedded applications using a UML profile.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

Evaluation of static and dynamic task mapping algorithms in NoC-based MPSoCs.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

HeMPS - a Framework for NoC-based MPSoC Generation.

[BibT_eX]

[DOI]

Roberto P. de Oliveira

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A monitoring and adaptive routing mechanism for QoS traffic on mesh NoC architectures.

[BibT_eX]

[DOI]

Fabien Clermidy

César Augusto Missio Marcon

Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009

2008

Comparison of network-on-chip mapping algorithms targeting low energy consumption.

[BibT_eX]

[DOI]

Edson Ifarraguirre Moreno

IET Comput. Digit. Tech., 2008

Validation of executable application models mapped onto network-on-chip platforms.

[BibT_eX]

[DOI]

Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008

A simplified executable model to evaluate latency and throughput of networks-on-chip.

[BibT_eX]

[DOI]

Jari Nurmi

Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

MOTIM: an industrial application using nocs.

[BibT_eX]

[DOI]

Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

NoC Power Estimation at the RTL Abstraction Level.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Deadlock-Free Multicast Routing Algorithm for Wormhole-Switched Mesh Networks-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Congestion-aware task mapping in heterogeneous MPSoCs.

[BibT_eX]

[DOI]

Ewerson Carvalho

Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

2007

Wrapper design for the reuse of a bus, network-on-chip, or other functional interconnect as test access mechanism.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2007

DfT for the Reuse of Networks-on-Chip as Test Access Mechanism.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

QoS in Networks-on-Chip - Beyond Priority and Circuit Switching Techniques.

[BibT_eX]

[DOI]

Aline Mello

Proceedings of the VLSI-SoC: Advanced Topics on Systems on a Chip, 2007

Buffer sizing for QoS flows in wormhole packet switching NoCs.

[BibT_eX]

[DOI]

Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

Router architecture for high-performance NoCs.

[BibT_eX]

[DOI]

Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007

Architectural Issues in Homogeneous NoC-Based MPSoC.

[BibT_eX]

[DOI]

Nicolas Saint-Jean

Cristiane R. Woszezenki

Ismael Grehs

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs.

[BibT_eX]

[DOI]

Ewerson Carvalho

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

SPP-NIDS - A Sea of Processors Platform for Network Intrusion Detection Systems.

[BibT_eX]

[DOI]

Luis Carlos Caruso

Hugo Schmitt

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

Communication Models in Networks-on-Chip.

[BibT_eX]

[DOI]

Aline Mello

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

A NoC-based Infrastructure to Enable Dynamic Self Reconfigurable Systems.

[BibT_eX]

Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2007

Inserting Data Encoding Techniques into NoC-Based Systems.

[BibT_eX]

[DOI]

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Congestion-Aware Task Mapping in NoC-based MPSoCs with Dynamic Workload.

[BibT_eX]

[DOI]

Ewerson Carvalho

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

MOTIM - A Scalable Architecture for Ethernet Switches.

[BibT_eX]

[DOI]

Erico Bastos

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Evaluation of Algorithms for Low Energy Mapping onto NoCs.

[BibT_eX]

[DOI]

Edson I. Moreno

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA.

[BibT_eX]

[DOI]

Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes.

[BibT_eX]

[DOI]

Proceedings of the 14th IEEE International Conference on Electronics, 2007

SCAFFI: An intrachip FPGA asynchronous interface based on hard macros.

[BibT_eX]

[DOI]

Proceedings of the 25th International Conference on Computer Design, 2007

Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs.

[BibT_eX]

[DOI]

Cristiane R. Woszezenki

Ismael Grehs

Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006

Application driven traffic modeling for NoCs.

[BibT_eX]

[DOI]

Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

Infrastructure for dynamic reconfigurable systems: choices and trade-offs.

[BibT_eX]

[DOI]

Proceedings of the 19th Annual Symposium on Integrated Circuits and Systems Design, 2006

Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry.

[BibT_eX]

[DOI]

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip.

[BibT_eX]

[DOI]

Ricardo A. L. Reis

Alberto García Ortiz

Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

A Leak Resistant SoC to Counteract Side Channel Attacks.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on System-on-Chip, 2006

Evaluation of current QoS Mechanisms in Networks on Chip.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on System-on-Chip, 2006

Reconfigurable Systems Enabled by a Network-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

A Leak Resistant Architecture Against Side Channel Attacks.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism.

[BibT_eX]

[DOI]

Proceedings of the 11th European Test Symposium, 2006

2005

Current Mask Generation: an Analog Circuit to Thwart DPA Attacks.

[BibT_eX]

[DOI]

Proceedings of the VLSI-SoC: From Systems To Silicon, 2005

Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs.

[BibT_eX]

[DOI]

Ricardo Augusto da Luz Reis

Proceedings of the VLSI-SoC: From Systems To Silicon, 2005

Traffic generation and performance evaluation for mesh-based NoCs.

[BibT_eX]

[DOI]

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation.

[BibT_eX]

[DOI]

Ricardo A. L. Reis

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

Current mask generation: a transistor level security against DPA attacks.

[BibT_eX]

[DOI]

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

Virtual channels in networks on chip: implementation and evaluation on hermes NoC.

[BibT_eX]

[DOI]

Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

A new hardware countermeasure for masking power signatures of crypto cores.

[BibT_eX]

Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

A scalable test strategy for network-on-chip routers.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique.

[BibT_eX]

[DOI]

Igor M. Reis

Fabiano Hessel

Proceedings of the 2005 Design, 2005

Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture.

[BibT_eX]

[DOI]

Proceedings of the 2005 Design, 2005

MAIA: a framework for networks on chip generation and verification.

[BibT_eX]

[DOI]

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

HERMES: an infrastructure for low area overhead packet-switching networks on chip.

[BibT_eX]

[DOI]

Integr., 2004

PaDReH: a framework for the design and implementation of dynamically and partially reconfigurable systems.

[BibT_eX]

[DOI]

Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

Reducing test time with processor reuse in network-on-chip based systems.

[BibT_eX]

[DOI]

Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications.

[BibT_eX]

[DOI]

Proceedings of the Field Programmable Logic and Application, 2004

MultiNoC: A Multiprocessing System Enabled by a Network on Chip.

[BibT_eX]

[DOI]

Proceedings of the 2004 Design, 2004

2003

A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping.

[BibT_eX]

Proceedings of the IFIP VLSI-SoC 2003, 2003

Are coarse grain reconfigurable architectures suitable for cryptography?

[BibT_eX]

Proceedings of the IFIP VLSI-SoC 2003, 2003

Software-Based Test for Nonprogrammable Cores in Bus-Based System-On-Chip Architectures.

[BibT_eX]

[DOI]

Leandro A. Oliveira

Proceedings of the VLSI-SOC: From Systems to Chips, 2003

Software-Based Test for Non-Programmable Cores in Bus-Based System-on-Chip Architectures.

[BibT_eX]

Leandro A. Oliveira

Luís Fernando Alves Pereira

Proceedings of the IFIP VLSI-SoC 2003, 2003

Design and Prototyping of Direct Torque Control of Induction Motors in FPGAs.

[BibT_eX]

[DOI]

Sandro Binsfeld Ferreira

José Felipe Haffner

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study.

[BibT_eX]

[DOI]

Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Exploiting reconfigurability for low-power control of embedded processors.

[BibT_eX]

[DOI]

Luigi Carro

Edgard de Faria Corrêa

R. Cardozo

Sergio Bampi

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Remote and Partial Reconfiguration of FPGAs: Tools and Trends.

[BibT_eX]

[DOI]

Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Propose of a Hardware Implementation for Fingerprint Systems.

[BibT_eX]

[DOI]

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

Design of a fingerprint system using a hardware/software environment.

[BibT_eX]

[DOI]

Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2003

Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 2003 Design, 2003

2002

Core Communication Interface for FPGAs.

[BibT_eX]

[DOI]

Aline Vieira de Mello

César Augusto Missio Marcon

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

Requirements, Primitives and Models for Systems Specification.

[BibT_eX]

[DOI]

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

A Heterogeneous and Distributed Co-Simulation Environment.

[BibT_eX]

[DOI]

Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

Prototyping of embedded digital systems from SDL language: a case study.

[BibT_eX]

[DOI]

Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop 2002, 2002

2001

Integrating the teaching of computer organization and architecture with digital hardware design early in undergraduate courses.

[BibT_eX]

[DOI]

IEEE Trans. Educ., 2001

Projeto para Prototipação de um IP Soft Core MAC Ethernet.

[BibT_eX]

João Baptista dos Santos Martins

Delfim Luiz Torok

Andrey V. Andreoli

RITA, 2001

Interconnection Length Estimation at Logic-Level.

[BibT_eX]

[DOI]

Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001

Using the CAN Protocol and Reconfigurable Computing Technology for Web-Based Smart House Auto.

[BibT_eX]

[DOI]

Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001

2000

Design of a Classification System for Rectangular Shapes Using a Co-Design Environment.

[BibT_eX]

[DOI]

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

WTROPIC: A WWW-Based Macro-Cell Generator.

[BibT_eX]

[DOI]

João Leonardo Fragoso

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

LASCA-Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design.

[BibT_eX]

[DOI]

F. K. Ferreira

Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999

A Virtual CMOS Library Approach for East Layout Synthesis.

[BibT_eX]

Ana Cristina Medina Pinto

Michel Robert

Daniel Auvergne

Proceedings of the VLSI: Systems on a Chip, 1999

1998

An Improved Path Enumeration Method Considering Different Fall and Rise Gate Delays.

[BibT_eX]

[DOI]

José Luís Güntzel