Luciano Ost
Orcid: 0000-0002-5160-5232
According to our database1,
Luciano Ost
authored at least 83 papers
between 2001 and 2023.
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Bibliography
2023
IEEE Embed. Syst. Lett., March, 2023
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Power and Performance Costs of Radiation-Hardened ML Inference Models Running on Edge Devices.
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023
2022
The Impact of Soft Errors in Memory Units of Edge Devices Executing Convolutional Neural Networks.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
SOFIA: An automated framework for early soft error assessment, identification, and mitigation.
J. Syst. Archit., 2022
Investigation of Hybrid Soft Error Mitigation Techniques for Applications running on Resource-constrained devices.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022
Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022
Soft Error Reliability Assessment of Lightweight Cryptographic Algorithms for IoT Edge Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
2021
An Extensive Soft Error Reliability Analysis of a Real Autonomous Vehicle Software Stack.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
Evaluation of the soft error assessment consistency of a JIT-based virtual platform simulator.
IET Comput. Digit. Tech., 2021
The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
RAT: A Lightweight Architecture Independent System-Level Soft Error Mitigation Technique.
Proceedings of the VLSI-SoC: Design Trends, 2020
Assessment of Machine Learning Algorithms for Near-Sensor Computing under Radiation Soft Errors.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Soft Error Reliability Assessment of Neural Networks on Resource-constrained IoT Devices.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
Soft Error Reliability Using Virtual Platforms - Early Evaluation of Multicore Systems
Springer, ISBN: 978-3-030-55703-4, 2020
2019
IEEE Trans. Circuits Syst. I Regul. Pap., 2019
IET Comput. Digit. Tech., 2019
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Non-intrusive Fault Injection Techniques for Efficient Soft Error Vulnerability Analysis.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques.
Proceedings of the VLSI-SoC: New Technology Enabler, 2019
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorations.
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Extensive evaluation of programming models and ISAs impact on multicore soft error reliability.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Proceedings of the 15th IEEE International New Circuits and Systems Conference, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems, 2017
2016
Efficient Embedded Software Migration towards Clusterized Distributed-Memory Architectures.
IEEE Trans. Computers, 2016
J. Syst. Archit., 2016
A lightweight software-based runtime temperature monitoring model for multiprocessor embedded systems.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Design space exploration for complex automotive applications: an engine control system case study.
Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation, 2016
2015
Microelectron. Reliab., 2015
A Distributed Energy-aware Task Mapping to Achieve Thermal Balancing and Improve Reliability of Many-core Systems.
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Trading-off system load and communication in mapping heuristics for improving NoC-based MPSoCs reliability.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Impact of dynamic voltage scaling and thermal factors on FinFET-based SRAM reliability.
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability.
Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
Proceedings of the 24th International Workshop on Power and Timing Modeling, 2014
2013
Power-aware dynamic mapping heuristics for NoC-based MPSoCs using a unified model-based approach.
ACM Trans. Embed. Comput. Syst., 2013
Instruction-driven timing CPU model for efficient embedded software development using OVP.
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
LiChEn: Automated Electrical Characterization of Asynchronous Standard Cell Libraries.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2012
ACM Trans. Reconfigurable Technol. Syst., 2012
Proceedings of the 7th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2012
Comparative analysis of dynamic task mapping heuristics in heterogeneous NoC-based MPSoCs.
Proceedings of the 2012 International Symposium on System on Chip, 2012
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
2011
PI and PID Regulation Approaches for Performance-Constrained Adaptive Multiprocessor System-on-Chip.
IEEE Embed. Syst. Lett., 2011
IEEE Des. Test Comput., 2011
Exploring dynamic mapping impact on NoC-based MPSoCs performance using a model-based framework.
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Proceedings of the 24th Symposium on Integrated Circuits and Systems Design, 2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Abstract models of NoC-based MPSoCs for design space exploration (Abstract models of NoC-based MPSoCs for design space exploration).
PhD thesis, 2010
Joint Validation of Application Models and Multi-Abstraction Network-on-Chip Platforms.
Int. J. Embed. Real Time Commun. Syst., 2010
Proceedings of the VLSI-SoC: Forward-Looking Trends in IC and Systems Design, 2010
A case study of hierarchically heterogeneous application modelling using UML and Ptolemy II.
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
Proceedings of the 17th IEEE International Conference on Electronics, 2010
2009
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
2008
Proceedings of the IEEE Third International Symposium on Industrial Embedded Systems, 2008
A simplified executable model to evaluate latency and throughput of networks-on-chip.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008
Applying UML Interactions and Actor-Oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
2006
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006
Proceedings of the 3rd ACM International Workshop on Performance Evaluation of Wireless Ad Hoc, 2006
2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Integr., 2004
2003
A Low Area Overhead Packet-switched Network on Chip: Architecture and Prototyping.
Proceedings of the IFIP VLSI-SoC 2003, 2003
2001
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001