Matthew J. P. Walker

According to our database1, Matthew J. P. Walker authored at least 5 papers between 2018 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
Optimizing FPGA Logic Block Architectures for Arithmetic.
IEEE Trans. Very Large Scale Integr. Syst., 2020

VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling.
ACM Trans. Reconfigurable Technol. Syst., 2020

Isometric Graph Neural Networks.
CoRR, 2020

2019
Generic Connectivity-Based CGRA Mapping via Integer Linear Programming.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
Architecture Exploration of Standard-Cell and FPGA-Overlay CGRAs Using the Open-Source CGRA-ME Framework.
Proceedings of the 2018 International Symposium on Physical Design, 2018


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