Kevin E. Murray

Orcid: 0000-0002-8151-8359

Affiliations:
  • University of Toronto, Department of Electrical and Computer Engineering, ON, Canada


According to our database1, Kevin E. Murray authored at least 15 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2023
Respect the Difference: Reinforcement Learning for Heterogeneous FPGA Placement.
Proceedings of the International Conference on Field Programmable Technology, 2023

2022
RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2020
Optimizing FPGA Logic Block Architectures for Arithmetic.
IEEE Trans. Very Large Scale Integr. Syst., 2020

VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling.
ACM Trans. Reconfigurable Technol. Syst., 2020

SymbiFlow and VPR: An Open-Source Design Flow for Commercial and Novel FPGAs.
IEEE Micro, 2020

Learn to Place: FPGA Placement Using Reinforcement Learning and Directed Moves.
Proceedings of the International Conference on Field-Programmable Technology, 2020

AIR: A Fast but Lazy Timing-Driven FPGA Router.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
Tatum: Parallel Timing Analysis for Faster Design Cycles and Improved Optimization.
Proceedings of the International Conference on Field-Programmable Technology, 2018

2017
Quantifying error: Extending static timing analysis with probabilistic transitions.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2015
Timing-Driven Titan: Enabling Large Benchmarks and Exploring the Gap between Academic and Commercial CAD.
ACM Trans. Reconfigurable Technol. Syst., 2015

HETRIS: Adaptive floorplanning for heterogeneous FPGAs.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014
Quantifying the cost and benefit of latency insensitive communication on FPGAs.
Proceedings of the 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2014

2013
From Quartus to VPR: Converting HDL to BLIF with the Titan flow.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Titan: Enabling large and complex benchmarks in academic CAD.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013


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