Jen-Wei Lee
According to our database1,
Jen-Wei Lee
authored at least 9 papers
between 2010 and 2015.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2007, "For contributions to engineering education and power system analysis".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2015
Efficient Hardware Architecture of η<sub>T</sub> Pairing Accelerator Over Characteristic Three.
IEEE Trans. Very Large Scale Integr. Syst., 2015
2014
Efficient Power-Analysis-Resistant Dual-Field Elliptic Curve Cryptographic Processor Using Heterogeneous Dual-Processing-Element Architecture.
IEEE Trans. Very Large Scale Integr. Syst., 2014
2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
2012
An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor.
IEEE Trans. Circuits Syst. II Express Briefs, 2012
A sub-100µW multi-functional cardiac signal processor for mobile healthcare applications.
Proceedings of the Symposium on VLSI Circuits, 2012
A high-performance elliptic curve cryptographic processor over GF(p) with SPA resistance.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
An Efficient Countermeasure against Correlation Power-Analysis Attacks with Randomized Montgomery Operations for DF-ECC Processor.
Proceedings of the Cryptographic Hardware and Embedded Systems - CHES 2012, 2012
2011
A dual-field elliptic curve cryptographic processor with a radix-4 unified division unit.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
A 521-bit dual-field elliptic curve cryptographic processor with power analysis resistance.
Proceedings of the 36th European Solid-State Circuits Conference, 2010