Ju-Hung Hsiao

According to our database, Ju-Hung Hsiao authored at least 4 papers between 2011 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2012

An Efficient DPA Countermeasure With Randomized Montgomery Operations for DF-ECC Processor.

Jen-Wei Lee, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee

IEEE Trans. Circuits Syst. II Express Briefs, 2012

A sub-100µW multi-functional cardiac signal processor for mobile healthcare applications.

Shu-Yu Hsu, Yingchieh Ho, Yuhwai Tseng, Ting-You Lin, Po-Yao Chang, Jen-Wei Lee, Ju-Hung Hsiao, Siou-Ming Chuang, Tze-Zheng Yang, Po-Chun Liu, Ten-Fang Yang, Ray-Jade Chen, Chauchin Su, Chen-Yi Lee

Proceedings of the Symposium on VLSI Circuits, 2012

A low cost DPA-resistant 8-bit AES core based on ring oscillators.

Hsing-Ping Fu, Ju-Hung Hsiao, Po-Chun Liu, Hsie-Chia Chang, Chen-Yi Lee

Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

2011

A 2.97 Gb/s DPA-resistant AES engine with self-generated random sequence.

Po-Chun Liu, Ju-Hung Hsiao, Hsie-Chia Chang, Chen-Yi Lee

Proceedings of the 37th European Solid-State Circuits Conference, 2011