Jianfu Lin

Orcid: 0000-0001-8195-9317

According to our database1, Jianfu Lin authored at least 6 papers between 2016 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2020
An Energy-Efficient 10-Gb/s CMOS Millimeter-Wave Transceiver With Direct-Modulation Digital Transmitter and I/Q Phase-Coupled Frequency Synthesizer.
IEEE J. Solid State Circuits, 2020

2018
A 77-GHz Mixed-Mode FMCW Signal Generator Based on Bang-Bang Phase Detector.
IEEE J. Solid State Circuits, 2018

2017
A 6.6 mW 1.25-2.25 GHz low phase noise PLL frequency synthesizer based on wide tuning range Class-C VCO.
Microelectron. J., 2017

A 5-bit phase-interpolator-based fractional-N frequency divider for digital phase-locked loops.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017

A 77-GHz mixed-mode FMCW signal generator based on bang-bang phase detector.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2016
A reconfigurable digital polar transmitter with open-loop phase modulation for Sub-GHz applications.
Proceedings of the 25th IEEE International Symposium on Industrial Electronics, 2016


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