Jieyi Long

According to our database, Jieyi Long authored at least 22 papers between 2005 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Efficient Arguments and Proofs for Batch Arithmetic Circuit Satisfiability.

Jieyi Long

IACR Cryptol. ePrint Arch., 2023

Large Language Model Guided Tree-of-Thought.

Jieyi Long

CoRR, 2023

A Dual-Agent Scheduler for Distributed Deep Learning Jobs on Public Cloud via Reinforcement Learning.

Mingzhe Xing, Hangyu Mao, Shenglin Yin, Lichen Pan, Zhengchao Zhang, Zhen Xiao, Jieyi Long

Proceedings of the 29th ACM SIGKDD Conference on Knowledge Discovery and Data Mining, 2023

Proof-of-Contribution-Based Design for Collaborative Machine Learning on Blockchain.

Baturalp Buyukates, Chaoyang He, Shanshan Han, Zhiyong Fang, Yupeng Zhang, Jieyi Long, Ali Farahanchi, Salman Avestimehr

Proceedings of the IEEE International Conference on Decentralized Applications and Infrastructures, 2023

2021

Off-Chain Micropayment Pool for High-ThroughputBandwidth Sharing Rewards.

Jieyi Long, Ribao Wei

CoRR, 2021

Off-Chain Micropayment Pool for High-Throughput Bandwidth Sharing Rewards.

Jieyi Long, Ribao Wei

Proceedings of the IEEE International Conference on Blockchain and Cryptocurrency, 2021

2019

Nakamoto Consensus with Verifiable Delay Puzzle.

Jieyi Long, Ribao Wei

CoRR, 2019

Scalable BFT Consensus Mechanism Through Aggregated Signature Gossip.

Jieyi Long, Ribao Wei

Proceedings of the IEEE International Conference on Blockchain and Cryptocurrency, 2019

2018

BDCP: A Framework for Big Data Copyright Protection Based on Digital Watermarking.

Jingyue Yang, Haiquan Wang, Zhaoyi Wang, Jieyi Long, Bowen Du

Proceedings of the Security, Privacy, and Anonymity in Computation, Communication, and Storage, 2018

2013

Theory and Analysis for Optimization of On-Chip Thermoelectric Cooling Systems.

Jieyi Long, Dawei Li, Seda Ogrenci Memik, Semail Ülgen

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2010

SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation.

Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail

IEEE Trans. Very Large Scale Integr. Syst., 2010

Optimization of an on-chip active cooling system based on thin-film thermoelectric coolers.

Jieyi Long, Seda Ogrenci Memik, Matthew Grayson

Proceedings of the Design, Automation and Test in Europe, 2010

Inversed Temperature Dependence aware clock skew scheduling for sequential circuits.

Jieyi Long, Seda Ogrenci Memik

Proceedings of the Design, Automation and Test in Europe, 2010

Optimization of the bias current network for accurate on-chip thermal monitoring.

Jieyi Long, Seda Ogrenci Memik

Proceedings of the Design, Automation and Test in Europe, 2010

A framework for optimizing thermoelectric active cooling systems.

Jieyi Long, Seda Ogrenci Memik

Proceedings of the 47th Design Automation Conference, 2010

2008

Optimizing Thermal Sensor Allocation for Microprocessors.

Seda Ogrenci Memik, Rajarshi Mukherjee, Min Ni, Jieyi Long

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

EBOARST: An Efficient Edge-Based Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithm.

Jieyi Long, Hai Zhou, Seda Ogrenci Memik

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Thermal monitoring mechanisms for chip multiprocessors.

Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee

ACM Trans. Archit. Code Optim., 2008

An <i>O</i>(<i>n</i>log<i>n</i>) edge-based algorithm for obstacle-avoiding rectilinear steiner tree construction.

Jieyi Long, Hai Zhou, Seda Ogrenci Memik

Proceedings of the 2008 International Symposium on Physical Design, 2008

Automated design of self-adjusting pipelines.

Jieyi Long, Seda Ogrenci Memik

Proceedings of the 45th Design Automation Conference, 2008

2007

A self-adjusting clock tree architecture to cope with temperature variations.

Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2005

An improved test access mechanism structure and optimization technique in system-on-chip.

Jianhua Feng, Jieyi Long, Wenhua Xu, Hongfei Ye

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005