Rajarshi Mukherjee

According to our database1, Rajarshi Mukherjee authored at least 34 papers between 1993 and 2019.

Collaborative distances:



In proceedings 
PhD thesis 


On csauthors.net:


On assumption-free tests and confidence intervals for causal effects estimated by machine learning.
CoRR, 2019

On Estimation of L<sub>{r}</sub>-Norms in Gaussian White Noise Models.
CoRR, 2017

Selection of wire electrical discharge machining process parameters using non-traditional optimization algorithms.
Appl. Soft Comput., 2012

A high-level clustering algorithm targeting dual V<sub>dd</sub> FPGAs.
ACM Trans. Design Autom. Electr. Syst., 2008

Optimizing Thermal Sensor Allocation for Microprocessors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Thermal monitoring mechanisms for chip multiprocessors.
ACM Trans. Archit. Code Optim., 2008

An Integrated Approach to Thermal Management in High-Level Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Fine-grain thermal profiling and sensor insertion for FPGAs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Thermal sensor allocation and placement for reconfigurable systems.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Physical aware frequency selection for dynamic thermal management in multi-core systems.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead.
Proceedings of the 2006 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2006

Systematic temperature sensor allocation and placement for microprocessors.
Proceedings of the 43rd Design Automation Conference, 2006

Early Quality Assessment for Low Power Behavioral Synthesis.
J. Low Power Electron., 2005

Peak temperature control and leakage reduction during binding in high level synthesis.
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

Temperature-aware resource allocation and binding in high-level synthesis.
Proceedings of the 42nd Design Automation Conference, 2005

Evaluation of dual V<sub>DD</sub> fabrics for low power FPGAs.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

High Level Design Validation: Current Practices and Future Directions.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Handling Data Streams while Compiling C Programs onto Hardware.
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

Power-Driven Design Partitioning.
Proceedings of the Field Programmable Logic and Application, 2004

Power Management for FPGAs: Power-Driven Design Partitioning.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

Solving the latch mapping problem in an industrial setting.
Proceedings of the 40th Design Automation Conference, 2003

Efficient Combinational Verification Using Overlapping Local BDDs and a Hash Table.
Formal Methods Syst. Des., 2002

Verification of an Industrial CC-NUMA Server.
Proceedings of the ASPDAC 2002 / VLSI Design 2002, 2002

An efficient solution to the storage correspondence problem for large sequential circuits.
Proceedings of ASP-DAC 2001, 2001

Testing, Verification, and Diagnosis in the Presence of Unknowns.
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

Hierarchical Error Diagnosis Targeting RTL Circuits.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Automatic partitioning for efficient combinatorial verification.
Proceedings of ASP-DAC 2000, 2000

An efficient filter-based approach for combinational verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Multiple Error Diagnosis Based on Xlists.
Proceedings of the 36th Conference on Design Automation, 1999

On More Efficient Combinational ATPG Using Functional Learning.
Proceedings of the 9th International Conference on VLSI Design (VLSI Design 1996), 1996

VERIFUL: VERIfication using FUnctional Learning.
Proceedings of the 1995 European Design and Test Conference, 1995

Advanced Verification Techniques Based on Learning.
Proceedings of the 32st Conference on Design Automation, 1995

Functional learning: a new approach to learning in digital circuits.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

A Reconfigurable Arithmetic Processor.
Proceedings of the Sixth International Conference on VLSI Design, 1993