Ja Chun Ku

According to our database, Ja Chun Ku authored at least 11 papers between 2005 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

SACTA: A Self-Adjusting Clock Tree Architecture for Adapting to Thermal-Induced Delay Variation.

Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail

IEEE Trans. Very Large Scale Integr. Syst., 2010

2008

Area Optimization for Leakage Reduction and Thermal Stability in Nanometer-Scale Technologies.

Ja Chun Ku, Yehea I. Ismail

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

2007

Thermal Management of On-Chip Caches Through Power Density Minimization.

Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail

IEEE Trans. Very Large Scale Integr. Syst., 2007

Thermal-Aware Methodology for Repeater Insertion in Low-Power VLSI Circuits.

Ja Chun Ku, Yehea I. Ismail

IEEE Trans. Very Large Scale Integr. Syst., 2007

On the Scaling of Temperature-Dependent Effects.

Ja Chun Ku, Yehea I. Ismail

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Variable latency caches for nanoscale processor.

Serkan Ozdemir, Arindam Mallik, Ja Chun Ku, Gokhan Memik, Yehea I. Ismail

Proceedings of the ACM/IEEE Conference on High Performance Networking and Computing, 2007

A Compact and Accurate Temperature-Dependent Model for CMOS Circuit Delay.

Ja Chun Ku, Yehea I. Ismail

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Attaining Thermal Integrity in Nanometer Chips.

Ja Chun Ku, Yehea I. Ismail

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A self-adjusting clock tree architecture to cope with temperature variations.

Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006

Power density minimization for highly-associative caches in embedded processors.

Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005

The importance of including thermal effects in estimating the effectiveness of power reduction techniques.

Ja Chun Ku, Maged Ghoneima, Yehea I. Ismail

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005