Jihyun Cho

According to our database1, Jihyun Cho authored at least 15 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2018
Modular 128-Channel Δ-ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems.
IEEE J. Solid State Circuits, 2018

Dynamic Power Reduction in Scalable Neural Recording Interface Using Spatiotemporal Correlation and Temporal Sparsity of Neural Signals.
IEEE J. Solid State Circuits, 2018

2016
A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise Suppression.
IEEE J. Solid State Circuits, 2016

2015
A PWM Buck Converter With Load-Adaptive Power Transistor Scaling Scheme Using Analog-Digital Hybrid Control for High Energy Efficiency in Implantable Biomedical Systems.
IEEE Trans. Biomed. Circuits Syst., 2015

An Energy/Illumination-Adaptive CMOS Image Sensor With Reconfigurable Modes of Operations.
IEEE J. Solid State Circuits, 2015

Toward 1024-channel parallel neural recording: Modular Δ-ΔΣ analog front-end architecture with 4.84fJ/C-s·mm<sup>2</sup> energy-area product.
Proceedings of the Symposium on VLSI Circuits, 2015

Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression.
Proceedings of the Symposium on VLSI Circuits, 2015

12.3 PWM buck converter with >80% PCE in 45μA-to-4mA loads using analog-digital hybrid control for impiantale biomedical systems.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
A 3.4-µW Object-Adaptive CMOS Image Sensor With Embedded Feature Extraction Algorithm for Motion-Triggered Object-of-Interest Imaging.
IEEE J. Solid State Circuits, 2014

A 3-D Camera With Adaptable Background Light Suppression Using Pixel-Binning and Super-Resolution.
IEEE J. Solid State Circuits, 2014

7.2 243.3pJ/pixel bio-inspired time-stamp-based 2D optic flow sensor for artificial compound eyes.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
A 3.4µW CMOS image sensor with embedded feature-extraction algorithm for motion-triggered object-of-interest imaging.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
A 1.36μW adaptive CMOS image sensor with reconfigurable modes of operation from available energy/illumination for distributed wireless sensor network.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2008
A 5000S/s Single-Chip Smart Eye-Tracking Sensor.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006
CMOS image sensor with analog gamma correction using nonlinear single-slope ADC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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