Jingyao Zhang

Orcid: 0000-0003-3202-6427

Affiliations:
  • University of California, Riverside, CA, USA


According to our database1, Jingyao Zhang authored at least 10 papers between 2021 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

Online presence:

On csauthors.net:

Bibliography

2025
SAIL: SRAM-Accelerated LLM Inference System with Lookup-Table-based GEMV.
CoRR, September, 2025

A Near-Cache Architectural Framework for Cryptographic Computing.
CoRR, September, 2025

No One-Size-Fits-All: A Workload-Driven Characterization of Bit-Parallel vs. Bit-Serial Data Layouts for Processing-using-Memory.
CoRR, September, 2025

Enabling Low-Cost Secure Computing on Untrusted In-Memory Architectures.
Proceedings of the 34th USENIX Security Symposium, 2025

Unlocking Energy-Efficient and High-Throughput Secure Data Communication in IoT with Memory-Centric Computing.
Proceedings of the 2025 IEEE International Parallel and Distributed Processing Symposium, 2025

CryptoSRAM: Enabling High-Throughput Cryptography on MCUs via In-SRAM Computing.
Proceedings of the 2025 Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC), 2025

2023
BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Sealer: In-SRAM AES for High-Performance and Low-Overhead Memory Encryption.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022

Inhale: Enabling High-Performance and Energy-Efficient In-SRAM Cryptographic Hash for IoT.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021
Hardware-Software Codesign of Weight Reshaping and Systolic Array Multiplexing for Efficient CNNs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021


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