Mohsen Imani

According to our database1, Mohsen Imani authored at least 136 papers between 2013 and 2022.

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Bibliography

2022
Stochastic Computing in Beyond Von-Neumann Era: Processing Bit-Streams in Memristive Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Locality-Based Encoder and Model Quantization for Efficient Hyper-Dimensional Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic.
IEEE Des. Test, 2022

An Ultra-Compact Single FeFET Binary and Multi-Bit Associative Search Engine.
CoRR, 2022

2021
Mockingbird: Defending Against Deep-Learning-Based Website Fingerprinting Attacks With Adversarial Traces.
IEEE Trans. Inf. Forensics Secur., 2021

Spiking Hyperdimensional Network: Neuromorphic Models Integrated with Memory-Inspired Framework.
CoRR, 2021

Scalable edge-based hyperdimensional learning system with brain-like neural adaptation.
Proceedings of the SC '21: The International Conference for High Performance Computing, Networking, Storage and Analysis, St. Louis, Missouri, USA, November 14, 2021

Robust In-Memory Computing with Hyperdimensional Stochastic Representation.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021

Sunder: Enabling Low-Overhead and Scalable Near-Data Pattern Matching Acceleration.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Efficient Brain-Inspired Hyperdimensional Learning with Spatiotemporal Structured Data.
Proceedings of the 29th International Symposium on Modeling, 2021

MACcelerator: Approximate Arithmetic Unit for Computational Acceleration.
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021

MIMHD: Accurate and Efficient Hyperdimensional Inference Using Multi-Bit In-Memory Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

AdaptBit-HD: Adaptive Model Bitwidth for Hyperdimensional Computing.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

Massively Parallel Big Data Classification on a Programmable Processing In-Memory Architecture.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

CORLD: In-Stream Correlation Manipulation for Low-Discrepancy Stochastic Computing.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Revisiting HyperDimensional Learning for FPGA and Low-Power Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

Real-Time and Robust Hyperdimensional Classification.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

ManiHD: Efficient Hyper-Dimensional Learning Using Manifold Trainable Encoder.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

HyGraph: Accelerating Graph Processing with Hybrid Memory-centric Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

FPGA Acceleration of Protein Back-Translation and Alignment.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Energy-Aware Designs of Ferroelectric Ternary Content Addressable Memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

HyDREA: Towards More Robust and Efficient Machine Learning Systems with Hyperdimensional Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

A Framework for Efficient and Binary Clustering in High-Dimensional Space.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

OnlineHD: Robust, Efficient, and Single-Pass Online Learning Using Hyperdimensional System.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

TruLook: A Framework for Configurable GPU Approximation.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

A Low-Cost FSM-based Bit-Stream Generator for Low-Discrepancy Stochastic Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

Cognitive Correlative Encoding for Genome Sequence Matching in Hyperdimensional System.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

StocHD: Stochastic Hyperdimensional System for Efficient and Robust Learning from Raw Data.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

CascadeHD: Efficient Many-Class Learning Framework Using Hyperdimensional Computing.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

RegHD: Robust and Efficient Regression in Hyper-Dimensional Learning System.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

PRID: Model Inversion Privacy Attacks in Hyperdimensional Learning Systems.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

DP-Sim: A Full-stack Simulation Infrastructure for Digital Processing In-Memory Architectures.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

HyperRec: Efficient Recommender Systems with Hyperdimensional Computing.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Cross-layer Design for Computing-in-Memory: From Devices, Circuits, to Architectures and Applications.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

PIM-DL: Boosting DNN Inference on Digital Processing In-Memory Architectures via Data Layout Optimizations.
Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020
Runtime Efficiency-Accuracy Tradeoff Using Configurable Floating Point Multiplier.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Data Reuse for Accelerated Approximate Warps.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

SearcHD: A Memory-Centric Hyperdimensional Computing With Stochastic Training.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

QuantHD: A Quantization Framework for Hyperdimensional Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Accelerating Hyperdimensional Computing on FPGAs by Exploiting Computational Reuse.
IEEE Trans. Computers, 2020

CryptoPIM: In-memory Acceleration for Lattice-based Cryptographic Hardware.
IACR Cryptol. ePrint Arch., 2020

Efficient Associative Search in Brain-Inspired Hyperdimensional Computing.
IEEE Des. Test, 2020

Trustworthy AI Inference Systems: An Industry Research View.
CoRR, 2020

Multi-label HD Classification in 3D Flash.
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

Deep Learning Acceleration using Digital-Based Processing In-Memory.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

DUAL: Acceleration of Clustering Algorithms using Digital-based Processing In-Memory.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Implementing binary neural networks in memory with approximate accumulation.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

THRIFTY: Training with Hyperdimensional Computing across Flash Hierarchy.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Optimally Approximated and Unbiased Floating-Point Multiplier with Runtime Configurability.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Deep Learning Acceleration with Neuron-to-Memory Transformation.
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

GenieHD: Efficient DNA Pattern Matching Accelerator Using Hyperdimensional Computing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

SCRIMP: A General Stochastic Computing Architecture using ReRAM in-Memory Processing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Prive-HD: Privacy-Preserved Hyperdimensional Computing.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Resistive CAM Acceleration for Tunable Approximate Computing.
IEEE Trans. Emerg. Top. Comput., 2019

NVQuery: Efficient Query Processing in Nonvolatile Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

NNPIM: A Processing In-Memory Architecture for Neural Network Acceleration.
IEEE Trans. Computers, 2019

Image Recognition Accelerator Design Using In-Memory Processing.
IEEE Micro, 2019

Hardware-Software Co-design to Accelerate Neural Network Applications.
ACM J. Emerg. Technol. Comput. Syst., 2019

Modified relay selection and circuit selection for faster Tor.
IET Commun., 2019

QubitHD: A Stochastic Acceleration Method for HD Computing-Based Machine Learning.
CoRR, 2019

Adv-DWF: Defending Against Deep-Learning-Based Website Fingerprinting Attacks with Adversarial Traces.
CoRR, 2019

Digital-based processing in-memory: a highly-parallel accelerator for data intensive applications.
Proceedings of the International Symposium on Memory Systems, 2019

CompHD: Efficient Hyperdimensional Computing Using Model Compression.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

RAPID: A ReRAM Processing in-Memory Architecture for DNA Sequence Alignment.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

FloatPIM: in-memory acceleration of deep neural network training with high precision.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

FPGA Energy Efficiency by Leveraging Thermal Margin.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

Workload-Aware Opportunistic Energy Efficiency in Multi-FPGA Platforms.
Proceedings of the International Conference on Computer-Aided Design, 2019

SemiHD: Semi-Supervised Learning Using Hyperdimensional Computing.
Proceedings of the International Conference on Computer-Aided Design, 2019

UPIM: Unipolar Switching Logic for High Density Processing-in-Memory Applications.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

DigitalPIM: Digital-based Processing In-Memory for Big Data Acceleration.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Exploring Processing In-Memory for Different Technologies.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

F5-HD: Fast Flexible FPGA-based Framework for Refreshing Hyperdimensional Computing.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

SparseHD: Algorithm-Hardware Co-optimization for Efficient High-Dimensional Computing.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

A Binary Learning Framework for Hyperdimensional Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

HDCluster: An Accurate Clustering Using Brain-Inspired High-Dimensional Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

CADE: Configurable Approximate Divider for Energy Efficiency.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Thermal-Aware Design and Management for Search-based In-Memory Acceleration.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

ARGA: Approximate Reuse for GPGPU Acceleration.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

ApproxLP: Approximate Multiplication with Linearization and Iterative Error Control.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

BRIC: Locality-based Encoding for Energy-Efficient Brain-Inspired Hyperdimensional Computing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

AdaptHD: Adaptive Efficient Training for Brain-Inspired Hyperdimensional Computing.
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019

GRAM: graph processing in a ReRAM-based computational memory.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

ALook: adaptive lookup for GPGPU acceleration.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

A Framework for Collaborative Learning in Secure High-Dimensional Space.
Proceedings of the 12th IEEE International Conference on Cloud Computing, 2019

Approximate CPU and GPU Design Using Emerging Memory Technologies.
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019

2018
Multi-Stage Tunable Approximate Search in Resistive Associative Memory.
IEEE Trans. Multi Scale Comput. Syst., 2018

Approximate Computing Using Multiple-Access Single-Charge Associative Memory.
IEEE Trans. Emerg. Top. Comput., 2018

Guard Sets in Tor using AS Relationships.
Proc. Priv. Enhancing Technol., 2018

Nvalt: Nonvolatile Approximate Lookup Table for GPU Acceleration.
IEEE Embed. Syst. Lett., 2018

RAPIDNN: In-Memory Deep Neural Network Acceleration Framework.
CoRR, 2018

Towards Predicting Efficient and Anonymous Tor Circuits.
Proceedings of the 27th USENIX Security Symposium, 2018

LUPIS: Latch-up based ultra efficient processing in-memory system.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

Deep neural network acceleration framework under hardware uncertainty.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

Program acceleration using nearest distance associative search.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

GAS: A Heterogeneous Memory Architecture for Graph Processing.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

RMAC: Runtime Configurable Floating Point Multiplier for Approximate Computing.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Efficient human activity recognition using hyperdimensional computing.
Proceedings of the 8th International Conference on the Internet of Things, 2018

RNSnet: In-Memory Neural Network Acceleration Using Residue Number System.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018

FELIX: fast and energy-efficient logic in memory.
Proceedings of the International Conference on Computer-Aided Design, 2018

GenPIM: Generalized processing in-memory to accelerate data intensive applications.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Hierarchical hyperdimensional computing for energy efficient classification.
Proceedings of the 55th Annual Design Automation Conference, 2018

Deep Fingerprinting: Undermining Website Fingerprinting Defenses with Deep Learning.
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018

Adversarial Traces for Website Fingerprinting Defense.
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018

HDNA: Energy-efficient DNA sequencing using hyperdimensional computing.
Proceedings of the 2018 IEEE EMBS International Conference on Biomedical & Health Informatics, 2018

CANNA: Neural network acceleration using configurable approximation on GPGPU.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

2017
Low-Power Sparse Hyperdimensional Encoder for Language Recognition.
IEEE Des. Test, 2017

Forming Guard Sets using AS Relationships.
CoRR, 2017

The Evaluation of Circuit Selection Methods on Tor.
CoRR, 2017

Enabling efficient system design using vertical nanowire transistor current mode logic.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017

CAP: Configurable resistive associative processor for near-data computing.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Efficient query processing in crossbar memory.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

VoiceHD: Hyperdimensional Computing for Efficient Speech Recognition.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

NNgine: Ultra-Efficient Nearest Neighbor Accelerator Based on In-Memory Computing.
Proceedings of the IEEE International Conference on Rebooting Computing, 2017

ORCHARD: Visual object recognition accelerator based on approximate in-memory processing.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Exploring Hyperdimensional Associative Memory.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

LookNN: Neural network with no multiplication.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Efficient neural network acceleration on GPGPU using content addressable memory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

CFPU: Configurable Floating Point Multiplier for Energy-Efficient Computing.
Proceedings of the 54th Annual Design Automation Conference, 2017

Ultra-Efficient Processing In-Memory for Data Intensive Applications.
Proceedings of the 54th Annual Design Automation Conference, 2017

MPIM: Multi-purpose in-memory processing using configurable resistive memory.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
A low-power hybrid magnetic cache architecture exploiting narrow-width values.
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016

Processing Acceleration with Resistive Memory-based Computation.
Proceedings of the Second International Symposium on Memory Systems, 2016

Low power data-aware STT-RAM based hybrid cache architecture.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

ReMAM: Low energy Resistive Multi-stage Associative Memory for energy efficient computing.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

ACAM: Approximate Computing Based on Adaptive Associative Memory with Online Learning.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

VarDroid: Online Variability Emulation in Android/Linux Platforms.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

DCC: Double Capacity Cache Architecture for Narrow-Width Values.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Toward an Efficient Website Fingerprinting Defense.
Proceedings of the Computer Security - ESORICS 2016, 2016

Resistive configurable associative memory for approximate computing.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

MASC: Ultra-low energy multiple-access single-charge TCAM for approximate computing.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
WTF-PAD: Toward an Efficient Website Fingerprinting Defense for Tor.
CoRR, 2015

Hierarchical design of robust and low data dependent FinFET based SRAM array.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

CAUSE: Critical Application Usage-Aware Memory System using Non-volatile Memory for Mobile Devices.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2013
Bottom-up design of a high performance ultra-low power DFT utilizing multiple-VDD, multiple-Vth and gate sizing.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013

Design of an ultra-low power 32-bit adder operating at subthreshold voltages in 45-nm FinFET.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013


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