Mohsen Imani
According to our database1,
Mohsen Imani
authored at least 136 papers
between 2013 and 2022.
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Bibliography
2022
Stochastic Computing in Beyond Von-Neumann Era: Processing Bit-Streams in Memristive Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Locality-Based Encoder and Model Quantization for Efficient Hyper-Dimensional Computing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
IEEE Des. Test, 2022
CoRR, 2022
2021
Mockingbird: Defending Against Deep-Learning-Based Website Fingerprinting Attacks With Adversarial Traces.
IEEE Trans. Inf. Forensics Secur., 2021
Spiking Hyperdimensional Network: Neuromorphic Models Integrated with Memory-Inspired Framework.
CoRR, 2021
Scalable edge-based hyperdimensional learning system with brain-like neural adaptation.
Proceedings of the SC '21: The International Conference for High Performance Computing, Networking, Storage and Analysis, St. Louis, Missouri, USA, November 14, 2021
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2021
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
Efficient Brain-Inspired Hyperdimensional Learning with Spatiotemporal Structured Data.
Proceedings of the 29th International Symposium on Modeling, 2021
Proceedings of the 22nd International Symposium on Quality Electronic Design, 2021
MIMHD: Accurate and Efficient Hyperdimensional Inference Using Multi-Bit In-Memory Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Massively Parallel Big Data Classification on a Programmable Processing In-Memory Architecture.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
HyDREA: Towards More Robust and Efficient Machine Learning Systems with Hyperdimensional Computing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
OnlineHD: Robust, Efficient, and Single-Pass Online Learning Using Hyperdimensional System.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Cognitive Correlative Encoding for Genome Sequence Matching in Hyperdimensional System.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
StocHD: Stochastic Hyperdimensional System for Efficient and Robust Learning from Raw Data.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
DP-Sim: A Full-stack Simulation Infrastructure for Digital Processing In-Memory Architectures.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
Cross-layer Design for Computing-in-Memory: From Devices, Circuits, to Architectures and Applications.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
PIM-DL: Boosting DNN Inference on Digital Processing In-Memory Architectures via Data Layout Optimizations.
Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021
2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Computers, 2020
IACR Cryptol. ePrint Arch., 2020
IEEE Des. Test, 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020
DUAL: Acceleration of Clustering Algorithms using Digital-based Processing In-Memory.
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Optimally Approximated and Unbiased Floating-Point Multiplier with Runtime Configurability.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
GenieHD: Efficient DNA Pattern Matching Accelerator Using Hyperdimensional Computing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
SCRIMP: A General Stochastic Computing Architecture using ReRAM in-Memory Processing.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
IEEE Trans. Emerg. Top. Comput., 2019
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IEEE Trans. Computers, 2019
ACM J. Emerg. Technol. Comput. Syst., 2019
CoRR, 2019
Adv-DWF: Defending Against Deep-Learning-Based Website Fingerprinting Attacks with Adversarial Traces.
CoRR, 2019
Digital-based processing in-memory: a highly-parallel accelerator for data intensive applications.
Proceedings of the International Symposium on Memory Systems, 2019
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
FloatPIM: in-memory acceleration of deep neural network training with high precision.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
Proceedings of the 37th IEEE International Conference on Computer Design, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019
SparseHD: Algorithm-Hardware Co-optimization for Efficient High-Dimensional Computing.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
BRIC: Locality-based Encoding for Energy-Efficient Brain-Inspired Hyperdimensional Computing.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 2019 IEEE Biomedical Circuits and Systems Conference, 2019
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
FACH: FPGA-based acceleration of hyperdimensional computing by reducing computational complexity.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
Proceedings of the 12th IEEE International Conference on Cloud Computing, 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
2018
IEEE Trans. Multi Scale Comput. Syst., 2018
IEEE Trans. Emerg. Top. Comput., 2018
IEEE Embed. Syst. Lett., 2018
Proceedings of the 27th USENIX Security Symposium, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the 8th International Conference on the Internet of Things, 2018
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018
Proceedings of the International Conference on Computer-Aided Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018
Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications Security, 2018
Proceedings of the 2018 IEEE EMBS International Conference on Biomedical & Health Informatics, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
IEEE Des. Test, 2017
Enabling efficient system design using vertical nanowire transistor current mode logic.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
Proceedings of the IEEE International Conference on Rebooting Computing, 2017
Proceedings of the IEEE International Conference on Rebooting Computing, 2017
ORCHARD: Visual object recognition accelerator based on approximate in-memory processing.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
Proceedings of the 5th Non-Volatile Memory Systems and Applications Symposium, 2016
Proceedings of the Second International Symposium on Memory Systems, 2016
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
ReMAM: Low energy Resistive Multi-stage Associative Memory for energy efficient computing.
Proceedings of the 17th International Symposium on Quality Electronic Design, 2016
ACAM: Approximate Computing Based on Adaptive Associative Memory with Online Learning.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Proceedings of the Computer Security - ESORICS 2016, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
2015
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015
CAUSE: Critical Application Usage-Aware Memory System using Non-volatile Memory for Mobile Devices.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
2013
Bottom-up design of a high performance ultra-low power DFT utilizing multiple-VDD, multiple-Vth and gate sizing.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013
Design of an ultra-low power 32-bit adder operating at subthreshold voltages in 45-nm FinFET.
Proceedings of the 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2013