Jinwook Burm

Orcid: 0000-0002-9594-771X

According to our database1, Jinwook Burm authored at least 30 papers between 2008 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Multi-Stage Reconfigurable RF-DC Converter With Deep-n-Well Biasing Using Body-Isolated MOSFET in 180-nm BCDMOS Process.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2023

Electro-Optical Phase Locked Loop design for FMCW LiDAR TX in 28-nm CMOS.
Proceedings of the 20th International SoC Design Conference, 2023

A Compact Design of SPAD Detector with Quenching Circuit for Reduced Dark Count Rate.
Proceedings of the 20th International SoC Design Conference, 2023

A 12-bit 5MS/s Synchronous SAR ADC With Comparator Using High Gain Pre-amplifier.
Proceedings of the 20th International SoC Design Conference, 2023

A 8-bit DPWM-based Analog Bypass Circuit and System for LED Matrix Headlamp in High-Voltage 180-nm CMOS Technology.
Proceedings of the 20th International SoC Design Conference, 2023

2022
A 12.5-Gb/s Switched Capacitor Based Two Tap DFE With High BER Performance.
Proceedings of the 19th International SoC Design Conference, 2022

2020
A 4-MHz Digitally Controlled Voltage-Mode Buck Converter With Embedded Transient Improvement Using Delay Line Control Techniques.
IEEE Trans. Circuits Syst., 2020

A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.
IEEE J. Solid State Circuits, 2020

All-digital half-rate referenceless CDR with single direction frequency sweep scheme using asymmetric binary phase detector.
IEICE Electron. Express, 2020

A 12-b 2 MS/s R-C Two-Step SAR ADC with Bit-Cycling Time Control and LSB Correction Logic.
Proceedings of the International SoC Design Conference, 2020

2019
Quenching bias circuit with current mirror for single photon detection.
IEICE Electron. Express, 2019

2018
A 30-MHz Voltage-Mode Buck Converter Using Delay-Line-Based PWM Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

Two CMOS time to digital converters using successive approximation register logic.
IEICE Electron. Express, 2018

2017
An Ultralow Power Time-Domain Temperature Sensor With Time-Domain Delta-Sigma TDC.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A low-complexity locking-accelerated digital PLL with multi-output bang-bang phase detector.
Microelectron. J., 2017

2016
Resolution tunable ring oscillator type TDC.
Proceedings of the International SoC Design Conference, 2016

High frame rate VGA CMOS image sensor using two-step single slope ADCs.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

A low-complexity fast-locking digital PLL with multi-output bang-bang phase detector.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
High Frame-Rate VGA CMOS Image Sensor Using Non-Memory Capacitor Two-Step Single-Slope ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

2014
A 13.5-mW 10-Gb/s 4-PAM Serial Link Transmitter in 0.13-µm CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2014

2013
A 0.18-µm CMOS 10-Gb/s Dual-Mode 10-PAM Serial Link Transceiver.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013

1.5-9.7-Gb/s Complete 4-PAM Serial Link Transceiver with a Wide Frequency Range CDR.
IEICE Trans. Electron., 2013

2012
A Low-Power Switching Method with a Bootstrapping Circuit for High-Speed Transmitters.
IEICE Trans. Electron., 2012

Time-domain temperature sensor using two stage vernier type time to digital converter for mobile application.
Proceedings of the International SoC Design Conference, 2012

2011
A Sub-Harmonic RF Transmitter Architecture with Simultaneous Power Combination and LO Leakage Cancellation.
IEICE Trans. Electron., 2011

A 0.18 µm CMOS 12 Gb/s 10-PAM Serial Link Transmitter.
IEICE Trans. Electron., 2011

Area-efficient fast scheduling schemes for MVC prediction architecture.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

2010
An Autofocus Sensor With Global Shutter Using Offset-Free Frame Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A Phase Noise Optimized 4 GHz Differential Colpitts VCO.
IEICE Trans. Electron., 2010

2008
A implementation of fully integrated frequency synthesizer For ISM band transceiver.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008


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